Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755229AbcDGHCq (ORCPT ); Thu, 7 Apr 2016 03:02:46 -0400 Received: from bh-25.webhostbox.net ([208.91.199.152]:59169 "EHLO bh-25.webhostbox.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751260AbcDGHCo (ORCPT ); Thu, 7 Apr 2016 03:02:44 -0400 Subject: Re: [PATCH 08/17] watchdog: qcom: configure BARK time in addition to BITE time To: Matthew McClintock , andy.gross@linaro.org, linux-arm-msm@vger.kernel.org References: <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org> <1458770712-10880-9-git-send-email-mmcclint@codeaurora.org> Cc: qca-upstream.external@qca.qualcomm.com, Wim Van Sebroeck , "open list:WATCHDOG DEVICE DRIVERS" , open list From: Guenter Roeck Message-ID: <57060615.3@roeck-us.net> Date: Thu, 7 Apr 2016 00:02:45 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <1458770712-10880-9-git-send-email-mmcclint@codeaurora.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-Authenticated_sender: linux@roeck-us.net X-OutGoing-Spam-Status: No, score=-1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - bh-25.webhostbox.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - roeck-us.net X-Get-Message-Sender-Via: bh-25.webhostbox.net: authenticated_id: linux@roeck-us.net X-Authenticated-Sender: bh-25.webhostbox.net: linux@roeck-us.net X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1729 Lines: 56 On 03/23/2016 03:05 PM, Matthew McClintock wrote: > For certain parts and some versions of TZ, TZ will reset the chip > when a BARK is triggered even though it was not configured here. So > by default let's configure this BARK time as well. > > Signed-off-by: Matthew McClintock Reviewed-by: Guenter Roeck > --- > drivers/watchdog/qcom-wdt.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c > index e46f18d..53f57c3 100644 > --- a/drivers/watchdog/qcom-wdt.c > +++ b/drivers/watchdog/qcom-wdt.c > @@ -22,18 +22,21 @@ > enum wdt_reg { > WDT_RST, > WDT_EN, > + WDT_BARK_TIME, > WDT_BITE_TIME, > }; > > static const u32 reg_offset_data_apcs_tmr[] = { > [WDT_RST] = 0x38, > [WDT_EN] = 0x40, > + [WDT_BARK_TIME] = 0x4C, > [WDT_BITE_TIME] = 0x5C, > }; > > static const u32 reg_offset_data_kpss[] = { > [WDT_RST] = 0x4, > [WDT_EN] = 0x8, > + [WDT_BARK_TIME] = 0x10, > [WDT_BITE_TIME] = 0x14, > }; > > @@ -62,6 +65,7 @@ static int qcom_wdt_start(struct watchdog_device *wdd) > > writel(0, wdt_addr(wdt, WDT_EN)); > writel(1, wdt_addr(wdt, WDT_RST)); > + writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME)); > writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME)); > writel(1, wdt_addr(wdt, WDT_EN)); > return 0; > @@ -104,6 +108,7 @@ static int qcom_wdt_restart(struct watchdog_device *wdd, unsigned long action, > > writel(0, wdt_addr(wdt, WDT_EN)); > writel(1, wdt_addr(wdt, WDT_RST)); > + writel(timeout, wdt_addr(wdt, WDT_BARK_TIME)); > writel(timeout, wdt_addr(wdt, WDT_BITE_TIME)); > writel(1, wdt_addr(wdt, WDT_EN)); > >