Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753186AbcDKHmK (ORCPT ); Mon, 11 Apr 2016 03:42:10 -0400 Received: from mail-sn1nam02on0060.outbound.protection.outlook.com ([104.47.36.60]:7362 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752083AbcDKHmG (ORCPT ); Mon, 11 Apr 2016 03:42:06 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Nava kishore Manne To: , , , , , , , , , , , CC: , , Subject: [PATCH] Axi-usb: Add support for 64-bit addressing. Date: Mon, 11 Apr 2016 13:11:46 +0530 Message-ID: <1460360506-14692-1-git-send-email-navam@xilinx.com> X-Mailer: git-send-email 2.1.2 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22252.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(199003)(189002)(86362001)(103686003)(19580405001)(2906002)(33646002)(5001770100001)(52956003)(90966002)(106466001)(50986999)(19580395003)(229853001)(575784001)(46386002)(5003940100001)(48376002)(36756003)(4326007)(50226001)(36386004)(87936001)(2201001)(45336002)(1220700001)(189998001)(1096002)(92566002)(50466002)(6806005)(81166005)(47776003)(5008740100001)(586003)(11100500001)(4001450100002)(63266004)(42186005)(107986001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1NAM02HT216;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;MLV:sfv;A:1;MX:1;LANG:; MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: fed4095f-f002-4293-dbb4-08d361dcc346 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:CY1NAM02HT216; X-Microsoft-Antispam-PRVS: <0d94d92df40e423f920465364218558e@CY1NAM02HT216.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13018025)(8121501046)(13015025)(13024025)(13017025)(13023025)(5005006)(10201501046)(3002001);SRVR:CY1NAM02HT216;BCL:0;PCL:0;RULEID:;SRVR:CY1NAM02HT216; X-Forefront-PRVS: 09090B6B69 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Apr 2016 07:41:58.0334 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT216 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4213 Lines: 114 This patch updates the driver to support 64-bit DMA addressing. Signed-off-by: Nava kishore Manne --- .../devicetree/bindings/usb/udc-xilinx.txt | 3 +- drivers/usb/gadget/udc/udc-xilinx.c | 38 ++++++++++++++++++++-- 2 files changed, 37 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/udc-xilinx.txt b/Documentation/devicetree/bindings/usb/udc-xilinx.txt index 47b4e39..d417872 100644 --- a/Documentation/devicetree/bindings/usb/udc-xilinx.txt +++ b/Documentation/devicetree/bindings/usb/udc-xilinx.txt @@ -7,12 +7,13 @@ Required properties: - interrupts : Should contain single irq line of USB2 device controller - xlnx,has-builtin-dma : if DMA is included - +- xlnx,addrwidth : Should be the dma addressing size in bits(ex: 40 bits). Example: axi-usb2-device@42e00000 { compatible = "xlnx,usb2-device-4.00.a"; interrupts = <0x0 0x39 0x1>; reg = <0x42e00000 0x10000>; xlnx,has-builtin-dma; + xlnx,addrwidth = <0x28>; }; diff --git a/drivers/usb/gadget/udc/udc-xilinx.c b/drivers/usb/gadget/udc/udc-xilinx.c index 1cbb0ac..eeb1401 100644 --- a/drivers/usb/gadget/udc/udc-xilinx.c +++ b/drivers/usb/gadget/udc/udc-xilinx.c @@ -47,6 +47,15 @@ #define XUSB_DMA_LENGTH_OFFSET 0x0210 /* DMA Length Register */ #define XUSB_DMA_STATUS_OFFSET 0x0214 /* DMA Status Register */ +/* DMA source Address Reg for LSB */ +#define XUSB_DMA_DSAR_ADDR_OFFSET_LSB 0x0308 +/* DMA source Address Reg for MSB */ +#define XUSB_DMA_DSAR_ADDR_OFFSET_MSB 0x030C +/* DMA destination Addr Reg LSB */ +#define XUSB_DMA_DDAR_ADDR_OFFSET_LSB 0x0310 +/* DMA destination Addr Reg MSB */ +#define XUSB_DMA_DDAR_ADDR_OFFSET_MSB 0x0314 + /* Endpoint Configuration Space offsets */ #define XUSB_EP_CFGSTATUS_OFFSET 0x00 /* Endpoint Config Status */ #define XUSB_EP_BUF0COUNT_OFFSET 0x08 /* Buffer 0 Count */ @@ -176,6 +185,7 @@ struct xusb_ep { * @addr: the usb device base address * @lock: instance of spinlock * @dma_enabled: flag indicating whether the dma is included in the system + * @dma_addrwidth:Indicate the DMA address width. * @read_fn: function pointer to read device registers * @write_fn: function pointer to write to device registers */ @@ -193,7 +203,7 @@ struct xusb_udc { void __iomem *addr; spinlock_t lock; bool dma_enabled; - + u32 dma_addrwidth; unsigned int (*read_fn)(void __iomem *); void (*write_fn)(void __iomem *, u32, u32); }; @@ -215,6 +225,19 @@ static const struct usb_endpoint_descriptor config_bulk_out_desc = { }; /** + * xudc_write64 - write 64bit value to device registers + * @addr: base addr of device registers + * @offset: register offset + * @val: data to be written + **/ +static void xudc_write64(void __iomem *addr, u32 offset, u64 val) +{ +#if defined(CONFIG_PHYS_ADDR_T_64BIT) + writeq(val, addr + offset); +#endif +} + +/** * xudc_write32 - little endian write to device registers * @addr: base addr of device registers * @offset: register offset @@ -330,8 +353,13 @@ static int xudc_start_dma(struct xusb_ep *ep, dma_addr_t src, * destination registers and then set the length * into the DMA length register. */ - udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src); - udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst); + if (udc->dma_addrwidth > 32) { + xudc_write64(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET_LSB, src); + xudc_write64(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET_LSB, dst); + } else { + udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src); + udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst); + } udc->write_fn(udc->addr, XUSB_DMA_LENGTH_OFFSET, length); /* @@ -2097,6 +2125,10 @@ static int xudc_probe(struct platform_device *pdev) udc->dma_enabled = of_property_read_bool(np, "xlnx,has-builtin-dma"); + ret = of_property_read_u32(np, "xlnx,addrwidth", &udc->dma_addrwidth); + if (ret < 0) + dev_warn(&pdev->dev, "missing xlnx,addrwidth property\n"); + /* Setup gadget structure */ udc->gadget.ops = &xusb_udc_ops; udc->gadget.max_speed = USB_SPEED_HIGH; -- 2.1.2