Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752613AbcDKHvM (ORCPT ); Mon, 11 Apr 2016 03:51:12 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:37111 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751076AbcDKHvJ (ORCPT ); Mon, 11 Apr 2016 03:51:09 -0400 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 11 Apr 2016 13:21:06 +0530 From: gpramod@codeaurora.org To: Stanimir Varbanov Cc: Rob Herring , Mark Rutland , Vinod Koul , Andy Gross , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, Sinan Kaya Subject: Re: [PATCH v2 2/5] dmaengine: qcom: bam_dma: clear BAM interrupt only if it is rised In-Reply-To: <1459896982-30171-3-git-send-email-stanimir.varbanov@linaro.org> References: <1459896982-30171-1-git-send-email-stanimir.varbanov@linaro.org> <1459896982-30171-3-git-send-email-stanimir.varbanov@linaro.org> Message-ID: User-Agent: Roundcube Webmail/1.1.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1416 Lines: 44 On 2016-04-06 04:26, Stanimir Varbanov wrote: > Currently we write BAM_IRQ_CLR register with zero even when no > BAM_IRQ occured. This write has some bad side effects when the > BAM instance is for the crypto engine. In case of crypto engine > some of the BAM registers are xPU protected and they cannot be > controlled by the driver. > > Signed-off-by: Stanimir Varbanov > Reviewed-by: Andy Gross > --- > drivers/dma/qcom/bam_dma.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > Tested-by: Pramod Gurav > diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c > index a486bc0f82e0..789d5f836bf7 100644 > --- a/drivers/dma/qcom/bam_dma.c > +++ b/drivers/dma/qcom/bam_dma.c > @@ -801,13 +801,17 @@ static irqreturn_t bam_dma_irq(int irq, void > *data) > if (srcs & P_IRQ) > tasklet_schedule(&bdev->task); > > - if (srcs & BAM_IRQ) > + if (srcs & BAM_IRQ) { > clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS)); > > - /* don't allow reorder of the various accesses to the BAM registers > */ > - mb(); > + /* > + * don't allow reorder of the various accesses to the BAM > + * registers > + */ > + mb(); > > - writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR)); > + writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR)); > + } > > return IRQ_HANDLED; > }