Subject: Re: [PATCH v8 3/3] irqchip: add nps Internal and external irqchips
To: Noam Camus <noamca@mellanox.com>, daniel.lezcano@linaro.org,
        jason@lakedaemon.net
References: <1459707299-31564-1-git-send-email-noamca@mellanox.com>
 <1459707299-31564-4-git-send-email-noamca@mellanox.com>
Cc: linux-kernel@vger.kernel.org, linux-snps-arc@lists.infradead.org,
        Noam Camus <noamc@ezchip.com>, Thomas Gleixner <tglx@linutronix.de>
From: Marc Zyngier <marc.zyngier@arm.com>
Organization: ARM Ltd
Message-ID: <570B9E46.7050402@arm.com>
Date: Mon, 11 Apr 2016 13:53:26 +0100
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On 03/04/16 19:14, Noam Camus wrote:
> From: Noam Camus <noamc@ezchip.com>
> 
> Adding EZchip NPS400 support.
> Internal interrupts are handled by Multi Thread Manager (MTM)
> Once interrupt is serviced MTM is acked for deactivating the interrupt.
> External interrupts are handled by MTM as well as at Global Interrupt
> Controller (GIC) e.g. serial and network devices.
> 
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
Jazz is not dead. It just smells funny...