Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933741AbcDLMbn (ORCPT ); Tue, 12 Apr 2016 08:31:43 -0400 Received: from mail-cys01nam02on0044.outbound.protection.outlook.com ([104.47.37.44]:51562 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932392AbcDLMbl (ORCPT ); Tue, 12 Apr 2016 08:31:41 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Anurag Kumar Vulisha To: Alessandro Zummo , Alexandre Belloni , CC: Michal Simek , , , , Punnaiah Choudary Kalluri , Anirudha Sarangi , Srikanth Vemula , "Anurag Kumar Vulisha" Subject: [PATCH 3/3] RTC: Update seconds time programming logic Date: Tue, 12 Apr 2016 17:45:46 +0530 Message-ID: <1460463346-24923-3-git-send-email-anuragku@xilinx.com> X-Mailer: git-send-email 2.1.2 In-Reply-To: <1460463346-24923-1-git-send-email-anuragku@xilinx.com> References: <1460463346-24923-1-git-send-email-anuragku@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22254.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(199003)(189002)(103686003)(189998001)(87936001)(1096002)(11100500001)(86362001)(36756003)(4001450100002)(106466001)(229853001)(47776003)(5008740100001)(5003940100001)(76176999)(63266004)(90966002)(46386002)(5001770100001)(92566002)(81166005)(48376002)(33646002)(4001430100002)(6806005)(50466002)(19580395003)(50226001)(107886002)(50986999)(19580405001)(1220700001)(15650500001)(52956003)(586003)(42186005)(2950100001)(2906002)(4326007)(36386004)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:BL2NAM02HT212;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;MLV:sfv;A:1;MX:1;LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: a87a6591-5d82-4c96-b412-08d362cc3342 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:BL2NAM02HT212; X-Microsoft-Antispam-PRVS: <114e6157aeb345409e6bb9aa5b664820@BL2NAM02HT212.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13023025)(13018025)(13024025)(13017025)(5005006)(8121501046)(13015025)(3002001)(10201501046);SRVR:BL2NAM02HT212;BCL:0;PCL:0;RULEID:;SRVR:BL2NAM02HT212; X-Forefront-PRVS: 0910AAF391 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Apr 2016 12:15:55.9731 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2NAM02HT212 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4046 Lines: 113 We programe RTC time using SET_TIME_WRITE register and read the RTC current time using CURRENT_TIME register. When we set the time by writing into SET_TIME_WRITE Register and immediately try to read the rtc time from CURRENT_TIME register, the previous old value is returned instead of the new loaded time. This is because RTC takes nearly 1 sec to update the new loaded value into the CURRENT_TIME register. This behaviour is expected in our RTC IP. This patch updates the driver to read the current time from SET_TIME_WRITE register instead of CURRENT_TIME when rtc time is requested within an 1sec period after setting the RTC time. Doing so will ensure the correct time is given to the user. Since there is an delay of 1sec in updating the CURRENT_TIME we are loading set time +1sec while programming the SET_TIME_WRITE register, doing this will give correct time without any delay when read from CURRENT_TIME. This patch updates the above said. Signed-off-by: Anurag Kumar Vulisha --- drivers/rtc/rtc-zynqmp.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c index f87f971..b98cebe 100644 --- a/drivers/rtc/rtc-zynqmp.c +++ b/drivers/rtc/rtc-zynqmp.c @@ -57,6 +57,7 @@ struct xlnx_rtc_dev { int alarm_irq; int sec_irq; int calibval; + int time_updated; }; static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm) @@ -64,6 +65,12 @@ static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm) struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev); unsigned long new_time; + /* + * The value written will be updated after 1 sec into the + * seconds read register, so we need to program time +1 sec + * to get the correct time on read. + */ + tm->tm_sec += 1; new_time = rtc_tm_to_time64(tm); if (new_time > RTC_SEC_MAX_VAL) @@ -78,6 +85,17 @@ static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm) writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR); + /* + * Clear the rtc interrupt status register after setting the + * time. During a read_time function, the code should read the + * RTC_INT_STATUS register and if bit 0 is still 0, it means + * that one second has not elapsed yet since RTC was set and + * the current time should be read from SET_TIME_READ register; + * otherwise, CURRENT_TIME register is read to report the time + */ + writel(RTC_INT_SEC | RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS); + xrtcdev->time_updated = 0; + return 0; } @@ -85,7 +103,17 @@ static int xlnx_rtc_read_time(struct device *dev, struct rtc_time *tm) { struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev); - rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_CUR_TM), tm); + if (xrtcdev->time_updated == 0) { + /* + * Time written in SET_TIME_WRITE has not yet updated into + * the seconds read register, so read the time from the + * SET_TIME_WRITE instead of CURRENT_TIME register. + */ + rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_SET_TM_RD), tm); + tm->tm_sec -= 1; + } else { + rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_CUR_TM), tm); + } return rtc_valid_tm(tm); } @@ -133,6 +161,9 @@ static void xlnx_init_rtc(struct xlnx_rtc_dev *xrtcdev) { u32 rtc_ctrl; + /* Enable RTC SEC interrupts */ + writel(RTC_INT_SEC, xrtcdev->reg_base + RTC_INT_EN); + /* Enable RTC switch to battery when VCC_PSAUX is not available */ rtc_ctrl = readl(xrtcdev->reg_base + RTC_CTRL); rtc_ctrl |= RTC_BATT_EN; @@ -169,8 +200,13 @@ static irqreturn_t xlnx_rtc_interrupt(int irq, void *id) /* Clear interrupt */ writel(status, xrtcdev->reg_base + RTC_INT_STS); - if (status & RTC_INT_SEC) + if (status & RTC_INT_SEC) { + if (xrtcdev->time_updated == 0) { + /* RTC updated the seconds read register */ + xrtcdev->time_updated = 1; + } rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF | RTC_UF); + } if (status & RTC_INT_ALRM) rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF | RTC_AF); -- 2.1.2