Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966081AbcDLUVl (ORCPT ); Tue, 12 Apr 2016 16:21:41 -0400 Received: from foss.arm.com ([217.140.101.70]:58155 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965266AbcDLUVk (ORCPT ); Tue, 12 Apr 2016 16:21:40 -0400 From: Jeremy Linton To: linux-kernel@vger.kernel.org Cc: will.deacon@arm.com, mark.rutland@arm.com, peterz@infradead.org, mingo@redhat.com, catalin.marinas@arm.com, msalter@redhat.com, timur@codeaurora.org, nleeder@codeaurora.org, agustinv@codeaurora.org, sfr@canb.auug.org.au, jan.glauber@gmail.com, Jeremy Linton Subject: [PATCH 5/6] arm64: pmu: Add ACPI support for A72 and ThunderX Date: Tue, 12 Apr 2016 15:21:10 -0500 Message-Id: <1460492471-15527-6-git-send-email-jeremy.linton@arm.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1460492471-15527-1-git-send-email-jeremy.linton@arm.com> References: <1460492471-15527-1-git-send-email-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1389 Lines: 36 Update the armv8_pmu_probe_table so that ACPI systems can identify the A72 and ThunderX PMUs. Signed-off-by: Jeremy Linton --- arch/arm64/include/asm/cputype.h | 1 + arch/arm64/kernel/perf_event.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 76423a7..2688755 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -74,6 +74,7 @@ #define ARM_CPU_PART_AEM_V8 0xD0F #define ARM_CPU_PART_FOUNDATION 0xD00 +#define ARM_CPU_PART_CORTEX_A72 0xD08 #define ARM_CPU_PART_CORTEX_A57 0xD07 #define ARM_CPU_PART_CORTEX_A53 0xD03 diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 8f12eac..e14ac54 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -870,6 +870,8 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = { static const struct pmu_probe_info armv8_pmu_probe_table[] = { ARMV8_PMU_PART_PROBE(ARM_CPU_PART_CORTEX_A53, armv8_a53_pmu_init), ARMV8_PMU_PART_PROBE(ARM_CPU_PART_CORTEX_A57, armv8_a57_pmu_init), + ARMV8_PMU_PART_PROBE(ARM_CPU_PART_CORTEX_A72, armv8_a72_pmu_init), + ARMV8_PMU_PART_PROBE(CAVIUM_CPU_PART_THUNDERX, armv8_thunder_pmu_init), PMU_PROBE(0, 0, armv8_pmuv3_init), /* if all else fails... */ { /* sentinel value */ } }; -- 2.4.3