Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966564AbcDLVbo (ORCPT ); Tue, 12 Apr 2016 17:31:44 -0400 Received: from g1t6225.austin.hp.com ([15.73.96.126]:42430 "EHLO g1t6225.austin.hp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934131AbcDLVbm (ORCPT ); Tue, 12 Apr 2016 17:31:42 -0400 Message-ID: <1460496564.2465.128.camel@j-VirtualBox> Subject: [PATCH] MCS spinlock: Use smp_cond_load_acquire() From: Jason Low To: Peter Zijlstra , Will Deacon , Linus Torvalds Cc: linux-kernel@vger.kernel.org, mingo@redhat.com, paulmck@linux.vnet.ibm.com, terry.rudd@hpe.com, waiman.long@hpe.com, boqun.feng@gmail.com, dave@stgolabs.net, jason.low2@hp.com Date: Tue, 12 Apr 2016 14:29:24 -0700 Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1381 Lines: 48 Hi Peter, This patch applies on top of the "smp_cond_load_acquire + cmpwait" series. --- For qspinlocks on ARM64, we would like use WFE instead of purely spinning. Qspinlocks internally have lock contenders spin on an MCS lock. Update arch_mcs_spin_lock_contended() such that it uses the new smp_cond_load_acquire() so that ARM64 can also override this spin loop with its own implementation using WFE. On x86, it can also cheaper to use this than spinning on smp_load_acquire(). Signed-off-by: Jason Low --- kernel/locking/mcs_spinlock.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/kernel/locking/mcs_spinlock.h b/kernel/locking/mcs_spinlock.h index c835270..5f21f23 100644 --- a/kernel/locking/mcs_spinlock.h +++ b/kernel/locking/mcs_spinlock.h @@ -22,13 +22,13 @@ struct mcs_spinlock { #ifndef arch_mcs_spin_lock_contended /* - * Using smp_load_acquire() provides a memory barrier that ensures - * subsequent operations happen after the lock is acquired. + * Using smp_cond_load_acquire() provides the acquire semantics + * required so that subsequent operations happen after the + * lock is acquired. */ #define arch_mcs_spin_lock_contended(l) \ do { \ - while (!(smp_load_acquire(l))) \ - cpu_relax_lowlatency(); \ + smp_cond_load_acquire(&l, VAL); \ } while (0) #endif -- 2.1.4