Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965543AbcDMGL2 (ORCPT ); Wed, 13 Apr 2016 02:11:28 -0400 Received: from mail-bl2nam02on0073.outbound.protection.outlook.com ([104.47.38.73]:4519 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S965424AbcDMGLZ convert rfc822-to-8bit (ORCPT ); Wed, 13 Apr 2016 02:11:25 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; lists.infradead.org; dkim=none (message not signed) header.d=none;lists.infradead.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Appana Durga Kedareswara Rao To: kbuild test robot CC: "kbuild-all@01.org" , "robh+dt@kernel.org" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , Michal Simek , Soren Brinkmann , "vinod.koul@intel.com" , "dan.j.williams@intel.com" , "moritz.fischer@ettus.com" , "laurent.pinchart@ideasonboard.com" , "luis@debethencourt.com" , Anirudha Sarangi , "Punnaiah Choudary Kalluri" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "dmaengine@vger.kernel.org" Subject: RE: [PATCH v5 2/2] dmaengine: Add Xilinx zynqmp dma engine driver support Thread-Topic: [PATCH v5 2/2] dmaengine: Add Xilinx zynqmp dma engine driver support Thread-Index: AQHRlUO5fHwQWeWfpUWLrhLC6ofZvp+G5PUAgACG3qA= Date: Wed, 13 Apr 2016 06:11:15 +0000 Message-ID: References: <1460524609-8722-2-git-send-email-appanad@xilinx.com> <201604131449.w6WNkVob%fengguang.wu@intel.com> In-Reply-To: <201604131449.w6WNkVob%fengguang.wu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.94.217] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22254.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(189002)(377454003)(199003)(13464003)(5250100002)(5003600100002)(4326007)(92566002)(2920100001)(6806005)(586003)(106466001)(1096002)(63266004)(5890100001)(2906002)(47776003)(15975445007)(110136002)(2900100001)(1220700001)(23726003)(3846002)(5004730100002)(46406003)(55846006)(6116002)(102836003)(81166005)(106116001)(5008740100001)(19580395003)(86362001)(50986999)(2950100001)(11100500001)(19580405001)(54356999)(50466002)(189998001)(76176999)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT149;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;MLV:sfv;MX:1;A:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: 559f472a-27c5-452b-d489-08d363627077 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:SN1NAM02HT149; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13017025)(13023025)(13015025)(13018025)(13024025)(8121501046)(5005006)(3002001)(10201501046);SRVR:SN1NAM02HT149;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT149; X-Forefront-PRVS: 0911D5CE78 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2016 06:11:22.7811 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT149 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2583 Lines: 67 Hi , > -----Original Message----- > From: kbuild test robot [mailto:lkp@intel.com] > Sent: Wednesday, April 13, 2016 11:38 AM > To: Appana Durga Kedareswara Rao > Cc: kbuild-all@01.org; robh+dt@kernel.org; pawel.moll@arm.com; > mark.rutland@arm.com; ijc+devicetree@hellion.org.uk; galak@codeaurora.org; > Michal Simek ; Soren Brinkmann ; > vinod.koul@intel.com; dan.j.williams@intel.com; Appana Durga Kedareswara > Rao ; moritz.fischer@ettus.com; > laurent.pinchart@ideasonboard.com; luis@debethencourt.com; Anirudha > Sarangi ; Punnaiah Choudary Kalluri > ; devicetree@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > dmaengine@vger.kernel.org > Subject: Re: [PATCH v5 2/2] dmaengine: Add Xilinx zynqmp dma engine driver > support > > Hi Kedareswara, > > [auto build test ERROR on robh/for-next] [also build test ERROR on v4.6-rc3 > next-20160412] [if your patch is applied to the wrong git tree, please drop us a > note to help improving the system] > > url: https://github.com/0day-ci/linux/commits/Kedareswara-rao- > Appana/Documentation-DT-dma-Add-Xilinx-zynqmp-dma-device-tree-binding- > documentation/20160413-132011 > base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux for-next > config: i386-allmodconfig (attached as .config) > reproduce: > # save the attached .config to linux build tree > make ARCH=i386 > > All errors (new ones prefixed by >>): > > drivers/dma/xilinx/zynqmp_dma.c: In function 'zynqmp_dma_reset': > >> drivers/dma/xilinx/zynqmp_dma.c:753:30: error: 'dchan' undeclared > >> (first use in this function) > zynqmp_dma_free_descriptors(dchan); > ^ > drivers/dma/xilinx/zynqmp_dma.c:753:30: note: each undeclared identifier is > reported only once for each function it appears in will fix in next version... Regards, Kedar. > > vim +/dchan +753 drivers/dma/xilinx/zynqmp_dma.c > > 747 static void zynqmp_dma_reset(struct zynqmp_dma_chan *chan) > 748 { > 749 writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + > ZYNQMP_DMA_IDS); > 750 > 751 zynqmp_dma_complete_descriptor(chan); > 752 zynqmp_dma_chan_desc_cleanup(chan); > > 753 zynqmp_dma_free_descriptors(dchan); > 754 zynqmp_dma_init(chan); > 755 } > 756 > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation