Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934782AbcDMKgp (ORCPT ); Wed, 13 Apr 2016 06:36:45 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:27519 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932845AbcDMKgn (ORCPT ); Wed, 13 Apr 2016 06:36:43 -0400 X-AuditID: cbfec7f4-f796c6d000001486-88-570e213693c4 Subject: Re: [PATCH] clk: samsung: exynos7: Enable clocks for CMU_CCORE and CMU_FSYS0 blocks To: Tomasz Figa , Alim Akhtar References: <1460459243-27120-1-git-send-email-alim.akhtar@samsung.com> Cc: linux-arm-kernel , Thomas Abraham , =?UTF-8?Q?Krzysztof_Koz=c5=82owski?= , linux-kernel , "linux-samsung-soc@vger.kernel.org" , linux-clk@vger.kernel.org, Stephen Boyd , Michael Turquette From: Sylwester Nawrocki Message-id: <570E2123.1000107@samsung.com> Date: Wed, 13 Apr 2016 12:36:19 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-version: 1.0 In-reply-to: Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNLMWRmVeSWpSXmKPExsVy+t/xa7pminzhBgs/yVs8mLeNzeL1C0OL TY+vsVp87LnHanF51xw2ixnn9zFZXDzlavHjTDeLRccyRotVu/4wOnB5vL/Ryu5xua+XyWPn rLvsHpuX1Hv0bVnF6PF5k1wAWxSXTUpqTmZZapG+XQJXxppvhxkLDvFVnH/5lqWB8Sx3FyMn h4SAiUTP6e+MELaYxIV769m6GLk4hASWMkpMuzsRynnOKHFn+TZmkCphgTiJvZuOgdkiAn4S m07uZoco6mOUmPP/OpjDLDCJWWLR9gdgVWwChhK9R/vAdvAKaEkcOrmQBcRmEVCV2HLlHSuI LSoQIfFk7kmoGkGJH5PvAdVwcHAKBEsc+5oGYjILqEtMmZILUsEsIC+xec1b5gmMArOQNMxC qJqFpGoBI/MqRtHU0uSC4qT0XEO94sTc4tK8dL3k/NxNjJAo+LKDcfExq0OMAhyMSjy8F9bw hguxJpYVV+YeYpTgYFYS4eWU5QsX4k1JrKxKLcqPLyrNSS0+xCjNwaIkzjt31/sQIYH0xJLU 7NTUgtQimCwTB6dUA6Pc6u8e6hnlgQFn1k6+u9V67vIZGfPnbXwZP6060v6Q36ugred0bqx9 PYGl6UK1+74HnGfMOTzcrurP7nY1jj6/vdK/clJ9lH3D4bC2L/uk8kO38n2IaJZ/+8733Mfi EnEuF/9/urIrXt2oNDomI+u3NI0r/dJy90urc5uy3szeemGdCLOd52UlluKMREMt5qLiRACL aAXTfgIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1813 Lines: 45 On 04/13/2016 08:26 AM, Tomasz Figa wrote: >> > @@ -205,7 +206,11 @@ static struct samsung_cmu_info topc_cmu_info __initdata = { >> > >> > static void __init exynos7_clk_topc_init(struct device_node *np) >> > { >> > + struct clk *clk; >> > + >> > samsung_cmu_register_one(np, &topc_cmu_info); >> > + clk = __clk_lookup("aclk_ccore_133"); >> > + clk_prepare_enable(clk); > > Shouldn't this be rather done before calling > samsung_cmu_register_one()? I don't remember exactly, but wouldn't > clock registration trigger reading back current (mux, div) values from > registers? > > Also, do we have any guarantees on order of initialization of > particular CMUs? I believe this will happen in order of DT nodes and > so would be not any kind of guarantee at all. If these clocks need to be kept enabled perhaps it's better to just set CLK_IS_CRITICAL flag for them? Patches adding this flag are already in clk-next branch in the clk git tree. This way the clocks would get enabled within the clk_register() call. The CMU registration order is enforced by listing input clocks to each CMU in DT. However, I wouldn't be concerned much about it in context of this patch. We are enabling here clocks which belong to same CMU. samsung_cmu_register_one() needs to be called first for subsequent __clk_lookup() calls to work. Perhaps related bits need to be set manually in CMU registers before registering a clock provider for the CMU, to fulfil the requirements. Anyway, summary of the $subject patch seems not precise enough: "This patch enables clocks for CMU_CCORE and CMU_FSYS0 blocks. This is required before accessing registers of these blocks." We need to enable selected clocks (i.e. access the CMU's registers) before accessing this CMU's registers? -- Regards, Sylwester