Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760711AbcDMNTF (ORCPT ); Wed, 13 Apr 2016 09:19:05 -0400 Received: from mail-ob0-f179.google.com ([209.85.214.179]:34712 "EHLO mail-ob0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759186AbcDMNTC (ORCPT ); Wed, 13 Apr 2016 09:19:02 -0400 MIME-Version: 1.0 In-Reply-To: <1459264932-27884-2-git-send-email-yendapally.reddy@broadcom.com> References: <1459264932-27884-1-git-send-email-yendapally.reddy@broadcom.com> <1459264932-27884-2-git-send-email-yendapally.reddy@broadcom.com> Date: Wed, 13 Apr 2016 15:19:01 +0200 Message-ID: Subject: Re: [PATCH RESEND 1/2] pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC From: Linus Walleij To: Yendapally Reddy Dhananjaya Reddy Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Florian Fainelli , Ray Jui , Scott Branden , Catalin Marinas , Will Deacon , Pramod Kumar , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , bcm-kernel-feedback-list , "linux-arm-kernel@lists.infradead.org" , "linux-gpio@vger.kernel.org" , Paul Gortmaker Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1221 Lines: 39 On Tue, Mar 29, 2016 at 5:22 PM, Yendapally Reddy Dhananjaya Reddy wrote: > This adds the initial support of the Broadcom NS2 pinmux driver > > Signed-off-by: Yendapally Reddy Dhananjaya Reddy > Reviewed-by: Ray Jui Sorry for slow replies. :( This mostly looks good. Some small things needs fixing: > +config PINCTRL_NS2_MUX > + bool "Broadcom Northstar2 pinmux driver" This is a bool driver, yet it uses MODULE* macros at the end of the file. Check the recent commits from Paul Gortmaker cleaning this up. Just a git log -p --author=Gortmaker in the main kernel tree will quickly give you an idea of what you have to do. > +static const unsigned int gpio_0_1_pins[] = {24, 25}; > +static const unsigned int pwm_0_pins[] = {24}; > +static const unsigned int pwm_1_pins[] = {25}; So either the same pins are used for GPIO or PWM. And this pattern persists. Do you have a brewing GPIO driver for this block as well? Is it a separate front-end calling to pinctrl using the pinctrl_gpio_* calls or do you plan to patch it into this driver? This is more of a question. Apart from this it looks good. Yours, Linus Walleij