Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932903AbcDNQSd (ORCPT ); Thu, 14 Apr 2016 12:18:33 -0400 Received: from mail.kernel.org ([198.145.29.136]:43270 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755302AbcDNQSb (ORCPT ); Thu, 14 Apr 2016 12:18:31 -0400 Date: Thu, 14 Apr 2016 11:18:26 -0500 From: Rob Herring To: Purna Chandra Mandal Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Mark Brown , devicetree@vger.kernel.org, Kumar Gala , Ian Campbell , Pawel Moll , Mark Rutland Subject: Re: [PATCH 1/2] dt/bindings/spi: Add bindings for PIC32 Quad-SPI driver. Message-ID: <20160414161826.GA12444@rob-hp-laptop> References: <1460553125-32649-1-git-send-email-purna.mandal@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1460553125-32649-1-git-send-email-purna.mandal@microchip.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1616 Lines: 49 On Wed, Apr 13, 2016 at 06:42:04PM +0530, Purna Chandra Mandal wrote: > Document Device tree bindings for quad SPI peripheral > found on Microchip PIC32 class devices. > > Signed-off-by: Purna Chandra Mandal > > Cc: Rob Herring > Cc: Mark Brown > --- > > Documentation/devicetree/bindings/spi/sqi-pic32.txt | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/sqi-pic32.txt One nit below, otherwise: Acked-by: Rob Herring > > diff --git a/Documentation/devicetree/bindings/spi/sqi-pic32.txt b/Documentation/devicetree/bindings/spi/sqi-pic32.txt > new file mode 100644 > index 0000000..5af9fab > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/sqi-pic32.txt > @@ -0,0 +1,18 @@ > +Microchip PIC32 Quad SPI controller > +----------------------------------- > +Required properties: > +- compatible: Should be "microchip,pic32mzda-sqi". > +- reg: Address and length of SQI controller register space. > +- interrupts: Should contain SQI interrupt. > +- clocks: Should contain phandle of two clocks in sequence, clock that drives > + clock on SPI bus and clock that drives SQI controller. > +- clock-names: Should be "spi_ck" and "reg_ck" in order. > + > +Example: > + sqi1: sqi@1f8e2000 { spi@... > + compatible = "microchip,pic32mzda-sqi"; > + reg = <0x1f8e2000 0x200>; > + clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>; > + clock-names = "spi_ck", "reg_ck"; > + interrupts = <169 IRQ_TYPE_LEVEL_HIGH>; > + }; > -- > 1.8.3.1 >