Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756442AbcDNSnA (ORCPT ); Thu, 14 Apr 2016 14:43:00 -0400 Received: from mail.savoirfairelinux.com ([208.88.110.44]:44150 "EHLO mail.savoirfairelinux.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754928AbcDNSm7 (ORCPT ); Thu, 14 Apr 2016 14:42:59 -0400 From: Vivien Didelot To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, kernel@savoirfairelinux.com, "David S. Miller" , Florian Fainelli , Andrew Lunn , Vivien Didelot Subject: [PATCH net 0/3] net: dsa: mv88e6xxx: fix hardware cross-chip bridging Date: Thu, 14 Apr 2016 14:42:06 -0400 Message-Id: <1460659329-11473-1-git-send-email-vivien.didelot@savoirfairelinux.com> X-Mailer: git-send-email 2.8.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1014 Lines: 24 In order to accelerate cross-chip switching of frames with the hardware, the DSA Tag ports, used to interconnect switch devices, must learn SA and DA addresses, and share the same FDB with the user ports. The two first patches restore address learning on DSA links. This fixes hardware cross-chip bridging in a VLAN filtering enabled system, which implements a bridge group as a 802.1Q VLAN and thus share an isolated address database between DSA and user ports. The third patch changes the distinct default databases used for each port, to the same address database. This fixes the hardware cross-chip bridging in a VLAN filtering disabled system, where a bridge group gets implemented only as a port-based VLAN. Vivien Didelot (3): net: dsa: mv88e6xxx: unlock DSA and CPU ports net: dsa: mv88e6xxx: enable SA learning on DSA ports net: dsa: mv88e6xxx: share a default FDB drivers/net/dsa/mv88e6xxx.c | 34 +++++----------------------------- 1 file changed, 5 insertions(+), 29 deletions(-) -- 2.8.0