Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751760AbcDOOmT (ORCPT ); Fri, 15 Apr 2016 10:42:19 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:44144 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1750927AbcDOOmS (ORCPT ); Fri, 15 Apr 2016 10:42:18 -0400 Message-ID: <1460731329.19786.4.camel@mtksdaap41> Subject: Re: [PATCH v6 3/4] soc: mediatek: Add MT2701 power dt-bindings From: Yingjoe Chen To: James Liao CC: Matthias Brugger , Sascha Hauer , Rob Herring , , , Kevin Hilman , , , Shunli Wang , Date: Fri, 15 Apr 2016 22:42:09 +0800 In-Reply-To: <1460685753.7028.5.camel@mtksdaap41> References: <1460621819-695-1-git-send-email-jamesjj.liao@mediatek.com> <1460621819-695-4-git-send-email-jamesjj.liao@mediatek.com> <1460631381.13240.3.camel@mtksdaap41> <1460685753.7028.5.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2910 Lines: 63 On Fri, 2016-04-15 at 10:02 +0800, James Liao wrote: > Hi Yingjoe, > > On Thu, 2016-04-14 at 18:56 +0800, Yingjoe Chen wrote: > > On Thu, 2016-04-14 at 16:16 +0800, James Liao wrote: > > > From: Shunli Wang > > > > > > Add power dt-bindings for MT2701. > > > > > > Signed-off-by: Shunli Wang > > > Signed-off-by: James Liao > > > Acked-by: Rob Herring > > > Reviewed-by: Kevin Hilman > > > --- > > > .../devicetree/bindings/soc/mediatek/scpsys.txt | 12 ++++++---- > > > include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++++++++++++ > > > 2 files changed, 34 insertions(+), 5 deletions(-) > > > create mode 100644 include/dt-bindings/power/mt2701-power.h > > > > > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > index e8f15e3..ebb3144 100644 > > > --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > @@ -9,17 +9,19 @@ domain control. > > > > > > The driver implements the Generic PM domain bindings described in > > > power/power_domain.txt. It provides the power domains defined in > > > -include/dt-bindings/power/mt8173-power.h. > > > +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. > > > > > > Required properties: > > > -- compatible: Must be "mediatek,mt8173-scpsys" > > > +- compatible: Should be one of: > > > + - "mediatek,mt2701-scpsys" > > > + - "mediatek,mt8173-scpsys" > > > - #power-domain-cells: Must be 1 > > > - reg: Address range of the SCPSYS unit > > > - infracfg: must contain a phandle to the infracfg controller > > > - clock, clock-names: clocks according to the common clock binding. > > > - The clocks needed "mm", "mfg", "venc" and "venc_lt". > > > - These are the clocks which hardware needs to be enabled > > > - before enabling certain power domains. > > > + The clocks needed "mm", "mfg", "venc", "venc_lt" and > > > + "ethif". These are the clocks which hardware needs to be > > > + enabled before enabling certain power domains. > > > > > > Clock ethif only exist on mt2701 so it is not required on mt8173. > > You are right. Each SoC needs different clock for each power domain. > Here list all subsystems of available SoCs. Binding should list required clocks for each specific platform. How about this: - clock, clock-names: clocks according to the common clock binding. These are the clocks which hardware needs to be enabled before enabling certain power domains. Required clocks for mt2701: "mm", "mfg", "ethif" Required clocks for mt8173: "mm", "mfg", "venc", "venc_lt" Joe.C