Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752784AbcDOQxI (ORCPT ); Fri, 15 Apr 2016 12:53:08 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16640 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752644AbcDOQxE (ORCPT ); Fri, 15 Apr 2016 12:53:04 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Fri, 15 Apr 2016 09:51:13 -0700 Message-ID: <571119C6.6000107@nvidia.com> Date: Fri, 15 Apr 2016 22:11:42 +0530 From: Laxman Dewangan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Jon Hunter , , , , , , CC: , , , Subject: Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control References: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> <1460473007-11535-7-git-send-email-ldewangan@nvidia.com> <5710F7A4.5070902@nvidia.com> <5710F6CA.6060700@nvidia.com> <57110560.80004@nvidia.com> <57110558.8010209@nvidia.com> <57110CA4.6050903@nvidia.com> In-Reply-To: <57110CA4.6050903@nvidia.com> X-Originating-IP: [10.19.65.30] X-ClientProxiedBy: DRHKMAIL103.nvidia.com (10.25.59.17) To bgmail102.nvidia.com (10.25.59.11) Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1006 Lines: 25 On Friday 15 April 2016 09:15 PM, Jon Hunter wrote: > On 15/04/16 16:14, Laxman Dewangan wrote: >> >> I used pins as this is the property from pincon generic so that I can >> use the generic implementation. >> >> Here, I will not go to the pin level control as HW does not support pin >> level control. >> >> I will say the unit should be interface level. Should we say >> IO_GROUP_CSIA, IO_GROUP_CSIB etc? > So we need to reflect the hardware in device-tree and although yes the > power-down for the CSI_x_xxx pads are all controlled together as a > single group, it does not feel right that we add a pseudo pin called > csix to represent these. > > The CSI_x_xxx pads are already in device-tree and so why not add a > property to each of these pads which has the IO rail information for > power-down and voltage-select? Which dt binding docs have these? I looked for nvidia,tegra210-pinmux.txt and not able to find csi_xxx. Here I dont want to refer the individual pins as control should be as group.