Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751386AbcDQUxh (ORCPT ); Sun, 17 Apr 2016 16:53:37 -0400 Received: from mail-lf0-f51.google.com ([209.85.215.51]:35563 "EHLO mail-lf0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751044AbcDQUxf (ORCPT ); Sun, 17 Apr 2016 16:53:35 -0400 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: Boris Brezillon Cc: linux-mtd@lists.infradead.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Mikael Starvik , Jesper Nilsson , Brian Norris , linux-cris-kernel@axis.com (open list:CRIS PORT), linux-kernel@vger.kernel.org (open list) Subject: [PATCH V3 04/11] CRIS v32: nand: set ECC algorithm explicitly Date: Sun, 17 Apr 2016 22:53:00 +0200 Message-Id: <1460926387-9563-5-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1460926387-9563-1-git-send-email-zajec5@gmail.com> References: <1460913104-27388-1-git-send-email-zajec5@gmail.com> <1460926387-9563-1-git-send-email-zajec5@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1427 Lines: 35 This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki --- arch/cris/arch-v32/drivers/mach-a3/nandflash.c | 1 + arch/cris/arch-v32/drivers/mach-fs/nandflash.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c index 5aa3f51..3f646c7 100644 --- a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c +++ b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c @@ -157,6 +157,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) /* 20 us command delay time */ this->chip_delay = 20; this->ecc.mode = NAND_ECC_SOFT; + this->ecc.algo = NAND_ECC_HAMMING; /* Enable the following for a flash based bad block table */ /* this->bbt_options = NAND_BBT_USE_FLASH; */ diff --git a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c index a7c17b0..a745405 100644 --- a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c +++ b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c @@ -148,6 +148,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) /* 20 us command delay time */ this->chip_delay = 20; this->ecc.mode = NAND_ECC_SOFT; + this->ecc.algo = NAND_ECC_HAMMING; /* Enable the following for a flash based bad block table */ /* this->bbt_options = NAND_BBT_USE_FLASH; */ -- 1.8.4.5