Date: Mon, 18 Apr 2016 11:59:02 -0400 (EDT)
Message-Id: <20160418.115902.1053705461620271779.davem@davemloft.net>
To: okaya@codeaurora.org
Cc: linux-rdma@vger.kernel.org, timur@codeaurora.org, cov@codeaurora.org,
        yishaih@mellanox.com, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2] net: ethernet: mellanox: correct page conversion
From: David Miller <davem@davemloft.net>
In-Reply-To: <87c17d3f979cf0167cd37077f39d0534@codeaurora.org>
References: <1460845412-13120-1-git-send-email-okaya@codeaurora.org>
	<20160418.000039.1946438541182822213.davem@davemloft.net>
	<87c17d3f979cf0167cd37077f39d0534@codeaurora.org>
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From: okaya@codeaurora.org
Date: Mon, 18 Apr 2016 01:06:27 -0400

> On 2016-04-18 00:00, David Miller wrote:
>> From: Sinan Kaya <okaya@codeaurora.org>
>> Date: Sat, 16 Apr 2016 18:23:32 -0400
>> 
>>> Current code is assuming that the address returned by
>>> dma_alloc_coherent
>>> is a logical address. This is not true on ARM/ARM64 systems. This
>>> patch
>>> replaces dma_alloc_coherent with dma_map_page API. The address
>>> returned
>>> can later by virtually mapped from the CPU side with vmap API.
>>> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
>> You can't do this.
>> The DMA map page API gives non-coherent mappings, and thus requires
>> proper flushing.
>> So a straight conversion like this is never legitimate.
> 
> I would agree on proper dma api usage. However, the code is already
> assuming coherent architecture by mapping the cpu pages as
> page_kernel.
> 
> Dma_map_page returns cached buffers and you don't need cache flushes
> on coherent architecture to make the data visible.

All you are telling me is that there are two bugs instead of one, so now
both need to be fixed.