Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753298AbcDSI2o (ORCPT ); Tue, 19 Apr 2016 04:28:44 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:10928 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751831AbcDSI2l (ORCPT ); Tue, 19 Apr 2016 04:28:41 -0400 From: Paul Burton To: , Ralf Baechle CC: James Hogan , Paul Burton , Paul Gortmaker , Subject: [PATCH v3 13/13] MIPS: mm: Panic if an XPA kernel is run without RIXI Date: Tue, 19 Apr 2016 09:25:11 +0100 Message-ID: <1461054311-387-14-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1461054311-387-1-git-send-email-paul.burton@imgtec.com> References: <1461054311-387-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.100.200.185] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 894 Lines: 34 XPA kernels hardcode for the presence of RIXI - the PTE format & its handling presume RI & XI bits. Make this dependence explicit by panicing if we run on a system that violates it. Signed-off-by: Paul Burton Reviewed-by: James Hogan --- Changes in v3: - Remove newline in panic() call. Changes in v2: - New patch, in response to clarification on patch 5. arch/mips/mm/tlbex.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 3f1a8a2..2afc710 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -2395,6 +2395,9 @@ void build_tlb_refill_handler(void) */ static int run_once = 0; + if (config_enabled(CONFIG_XPA) && !cpu_has_rixi) + panic("Kernels supporting XPA currently require CPUs with RIXI"); + output_pgtable_bits_defines(); check_pabits(); -- 2.8.0