Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932466AbcDSPIf (ORCPT ); Tue, 19 Apr 2016 11:08:35 -0400 Received: from mail-vk0-f41.google.com ([209.85.213.41]:36507 "EHLO mail-vk0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754762AbcDSPId (ORCPT ); Tue, 19 Apr 2016 11:08:33 -0400 MIME-Version: 1.0 In-Reply-To: <1460968919-136371-1-git-send-email-lipengcheng8@huawei.com> References: <1460968919-136371-1-git-send-email-lipengcheng8@huawei.com> Date: Tue, 19 Apr 2016 09:08:32 -0600 Message-ID: Subject: Re: [PATCH] coresight: etm4x: Add DT implementation. From: Mathieu Poirier To: lipengcheng Cc: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , lizhong11@hisilicon.com, Feng Chen , liuyongfu@hisilicon.com, Dan Zhao Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1661 Lines: 55 On 18 April 2016 at 02:41, lipengcheng wrote: > Add DT implementation for A72 and Atermis board. > > Signed-off-by: Li Pengcheng > Signed-off-by: Li Zhong > --- > drivers/hwtracing/coresight/coresight-etm4x.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c > index 6396b28..76bfad1 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x.c > @@ -825,6 +825,16 @@ static struct amba_id etm4_ids[] = { > .mask = 0x000fffff, > .data = "ETM 4.0", > }, > + { /* ETM 4.0 - A72 board */ > + .id = 0x000bb95a, > + .mask = 0x000fffff, > + .data = "ETM 4.0", > + }, > + { /* ETM 4.0 - Atermis board */ > + .id = 0x000bb959, > + .mask = 0x000fffff, > + .data = "ETM 4.0", > + }, > { 0, 0}, > }; I'm good with this patch and have the intention of taking it. On the flip side I would like a better description of the processor the .id can be found on. I think the current upstream code ("ETM 4.0 - Qualcomm" and "ETM 4.0 - Juno board") provides an insufficient description and won't scale well. >From here on the convention should be "ETM [rev] - [processor], [processor name], [manufacturer]" As such the above would become: /* ETM 4.0 - A72, HSXYZ, HiSillicon */ Get back to me if you have questions. Thanks, Mathieu. > > -- > 1.8.3.2 >