Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933176AbcDSQDN (ORCPT ); Tue, 19 Apr 2016 12:03:13 -0400 Received: from mail-db3on0065.outbound.protection.outlook.com ([157.55.234.65]:31680 "EHLO emea01-db3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932910AbcDSQDM convert rfc822-to-8bit (ORCPT ); Tue, 19 Apr 2016 12:03:12 -0400 X-Greylist: delayed 5620 seconds by postgrey-1.27 at vger.kernel.org; Tue, 19 Apr 2016 12:03:11 EDT From: Laurentiu Tudor To: Ard Biesheuvel , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "will.deacon@arm.com" , "mark.rutland@arm.com" , "james.morse@arm.com" CC: "catalin.marinas@arm.com" Subject: Re: [PATCH 5/8] arm64: kernel: replace early 64-bit literal loads with move-immediates Thread-Topic: [PATCH 5/8] arm64: kernel: replace early 64-bit literal loads with move-immediates Thread-Index: AQHRmYTivC0V8MSvUEG55XDQXaii1J+RXLYA Date: Tue, 19 Apr 2016 14:29:27 +0000 Message-ID: <571640C6.4040901@nxp.com> References: <1460992188-23295-1-git-send-email-ard.biesheuvel@linaro.org> <1460992188-23295-6-git-send-email-ard.biesheuvel@linaro.org> In-Reply-To: <1460992188-23295-6-git-send-email-ard.biesheuvel@linaro.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: linaro.org; dkim=none (message not signed) header.d=none;linaro.org; dmarc=none action=none header.from=nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [192.88.146.1] x-ms-office365-filtering-correlation-id: 6c5cace6-90e2-42e3-0d52-08d3685f0369 x-microsoft-exchange-diagnostics: 1;VI1PR0401MB1855;5:hDwsefrRuoJzX6yUw7s34kz3uU/f71jRsSoByAzyGx+ZIzo5FPcD5OzALqZJP66k2WAshls04BpxMsZtHC55s1SdMvjcPyr2vnvvRLqPQ/xDPL5Qj9/4zV5ScCkSo33Z6o/VjstVEy60HmKMNKdr7ipGE1ILMGvBBGYaybLuP/0ZtRNEzcELYDAPETyTJHNL;24:gVeNUWviU9RbgF9GbFwq7BTTxg1UQSI9MFpeuLGJXx/AMOoZ4NR6N4rJOll3YjQRaRPNhW7ncZWQXJo7tsrC/oCtqHKSUg5UJBYgibNy3lU=;7:k6GCy8Im+oZf+FpLKyj6EddArA5XRtnSwfxXN+VQmFehFZ+Tp1hGwfdmtcFOYyhZPCwRA9atutCCIVB3CvsoEm3gleAprCVz/194NfLlonTZGU3g56enXXFaH1wWurRJJ3hE3DN1d48EH/O5rb6WCB5E4b2J9Lvsg1S2gMJeHdjjCRMljEUQlMonx2NDgVz8q++3nukS3PTJqiise0OshgZQPK6yI/H6ergMSj2Nk30= x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:VI1PR0401MB1855; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(9101521026)(601004)(2401047)(5005006)(8121501046)(3002001)(10201501046)(6055026);SRVR:VI1PR0401MB1855;BCL:0;PCL:0;RULEID:;SRVR:VI1PR0401MB1855; x-forefront-prvs: 0917DFAC67 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(377454003)(24454002)(3660700001)(189998001)(2501003)(5008740100001)(3846002)(54356999)(3280700002)(5001770100001)(102836003)(586003)(19580395003)(86362001)(76176999)(59896002)(50986999)(87266999)(11100500001)(6116002)(19580405001)(87936001)(122556002)(65816999)(99136001)(5004730100002)(80316001)(106116001)(2900100001)(2950100001)(77096005)(4326007)(81166005)(2201001)(10400500002)(1096002)(66066001)(2906002)(92566002)(1220700001)(33656002)(36756003)(14773001)(357404004);DIR:OUT;SFP:1101;SCL:1;SRVR:VI1PR0401MB1855;H:VI1PR0401MB1856.eurprd04.prod.outlook.com;FPR:;SPF:None;MLV:sfv;LANG:en; spamdiagnosticoutput: 1:23 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset=US-ASCII Content-ID: <47865CC883151E498D0F860846B435DF@eurprd04.prod.outlook.com> Content-Transfer-Encoding: 7BIT MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Apr 2016 14:29:27.6520 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB1855 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2116 Lines: 61 On 04/18/2016 06:09 PM, Ard Biesheuvel wrote: > When building a relocatable kernel, we currently rely on the fact that > early 64-bit literal loads need to be deferred to after the relocation > has been performed only if they involve symbol references, and not if > they involve assemble time constants. While this is not an unreasonable > assumption to make, it is better to switch to movk/movz sequences, since > these are guaranteed to be resolved at link time, simply because there are > no dynamic relocation types to describe them. > > Signed-off-by: Ard Biesheuvel > --- > arch/arm64/kernel/head.S | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 0d487d90d221..dae9cabaadf5 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -337,7 +337,7 @@ __create_page_tables: > cmp x0, x6 > b.lo 1b > > - ldr x7, =SWAPPER_MM_MMUFLAGS > + mov x7, SWAPPER_MM_MMUFLAGS mov_q here too? --- Best Regards, Laurentiu > > /* > * Create the identity mapping. > @@ -393,7 +393,7 @@ __create_page_tables: > * Map the kernel image (starting with PHYS_OFFSET). > */ > mov x0, x26 // swapper_pg_dir > - ldr x5, =KIMAGE_VADDR > + mov_q x5, KIMAGE_VADDR > add x5, x5, x23 // add KASLR displacement > create_pgd_entry x0, x5, x3, x6 > ldr w6, =kernel_img_size > @@ -631,7 +631,7 @@ ENTRY(secondary_holding_pen) > bl el2_setup // Drop to EL1, w20=cpu_boot_mode > bl set_cpu_boot_mode_flag > mrs x0, mpidr_el1 > - ldr x1, =MPIDR_HWID_BITMASK > + mov_q x1, MPIDR_HWID_BITMASK > and x0, x0, x1 > adr_l x3, secondary_holding_pen_release > pen: ldr x4, [x3] > @@ -773,7 +773,7 @@ __primary_switch: > ldr w9, =__rela_offset // offset to reloc table > ldr w10, =__rela_size // size of reloc table > > - ldr x11, =KIMAGE_VADDR // default virtual offset > + mov_q x11, KIMAGE_VADDR // default virtual offset > add x11, x11, x23 // actual virtual offset > add x8, x8, x11 // __va(.dynsym) > add x9, x9, x11 // __va(.rela) >