Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755263AbcDSVda (ORCPT ); Tue, 19 Apr 2016 17:33:30 -0400 Received: from host.buserror.net ([209.198.135.123]:43672 "EHLO host.buserror.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933259AbcDSVd2 (ORCPT ); Tue, 19 Apr 2016 17:33:28 -0400 Message-ID: <1461101600.32510.207.camel@buserror.net> From: Scott Wood To: Alessio Igor Bogani Cc: Kumar Gala , linuxppc-dev@lists.ozlabs.org, LKML Date: Tue, 19 Apr 2016 16:33:20 -0500 In-Reply-To: References: <460384482-21320-1-git-send-email-alessio.bogani@elettra.eu> <1460966279-29188-1-git-send-email-alessio.bogani@elettra.eu> <1461039981.32510.201.camel@buserror.net> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.16.5-1ubuntu3.1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 75.72.173.242 X-SA-Exim-Mail-From: oss@buserror.net X-Spam-Report: * -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP * -15 BAYES_00 BODY: Bayes spam probability is 0 to 1% * [score: 0.0000] Subject: Re: [PATCH v2 1/1] powerpc/86xx: Add support for Emerson/Artesyn MVME7100 X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:57:07 +0000) X-SA-Exim-Scanned: Yes (on host.buserror.net) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1139 Lines: 34 On Tue, 2016-04-19 at 10:33 +0200, Alessio Igor Bogani wrote: > Hi Scott, > > Thanks for reviewing it! > > On 19 April 2016 at 06:26, Scott Wood wrote: > > On Mon, 2016-04-18 at 09:57 +0200, Alessio Igor Bogani wrote: > > > + pci0: pcie@f1008000 { > > > + reg = <0xf1008000 0x1000>; > > > + ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 > > > 0x50000000 > > > + 0x01000000 0x0 0x00000000 0xf0000000 0x0 > > > 0x00800000>; > [...] > > > + > > > + pci1: pcie@f1009000 { > > > + compatible = "fsl,mpc8641-pcie"; > > > + device_type = "pci"; > > > + #size-cells = <2>; > > > + #address-cells = <3>; > > > + reg = <0xf1009000 0x1000>; > > > + bus-range = <0 0xff>; > > > > Why are pci0 and pci1 so different? Why does mpc8641si-post.dtsi not have > > pci1? > > You are right. The MPC8641 processor offers two pci so > mpc8641si-post.dtsi should be the right place where to define both. > What about the boards which don't use the pci1? Will 'status = > "disabled"' be enough? Yes. -Scott