Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932530AbcDTHUR (ORCPT ); Wed, 20 Apr 2016 03:20:17 -0400 Received: from mail-sn1nam02on0078.outbound.protection.outlook.com ([104.47.36.78]:26599 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932452AbcDTHUL (ORCPT ); Wed, 20 Apr 2016 03:20:11 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Kedareswara rao Appana To: , , , , , , , , , , , , , , CC: , , , Subject: [PATCH 1/2] Documentation: DT: vdma: Add clock support for vdma Date: Wed, 20 Apr 2016 12:49:59 +0530 Message-ID: <1461136800-20334-1-git-send-email-appanad@xilinx.com> X-Mailer: git-send-email 2.1.2 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22272.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(189002)(199003)(19580395003)(46386002)(81166005)(33646002)(4326007)(90966002)(19580405001)(586003)(50226001)(4001450100002)(6806005)(42186005)(5008740100001)(86362001)(5003940100001)(47776003)(1096002)(1220700001)(229853001)(11100500001)(106466001)(63266004)(48376002)(92566002)(103686003)(87936001)(50466002)(36386004)(2201001)(5001770100001)(45336002)(50986999)(2906002)(52956003)(36756003)(189998001)(921003)(107986001)(83996005)(1121003)(2101003);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT007;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;MLV:nov;MX:1;A:1;PTR:unknown-60-83.xilinx.com;LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 75cf6e0a-68ab-462a-cc31-08d368ec33fa X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:SN1NAM02HT007; X-Microsoft-Antispam-PRVS: <3cbec540c806410dac4a32a2c1ac2876@SN1NAM02HT007.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(9101521040)(601004)(2401047)(8121501046)(13017025)(13018025)(5005006)(13015025)(13023025)(13024025)(10201501046)(3002001);SRVR:SN1NAM02HT007;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT007; X-Forefront-PRVS: 0918748D70 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Apr 2016 07:20:07.7860 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT007 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1469 Lines: 34 This patch updates the binding doc with clock description for vdma. Signed-off-by: Kedareswara rao Appana --- Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt index fcc2b65..e1c9019 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt @@ -21,6 +21,10 @@ Required properties: - dma-channel child node: Should have at least one channel and can have up to two channels per device. This node specifies the properties of each DMA channel (see child node properties below). +- clocks: Input clock specifier. Refer to common clock bindings. +- clock-names: List of input clocks "axi_clk", "tx_clk", "txs_clk" (list of input + cloks may vary based on the ip configuration. see clock bindings + for more info). Required properties for VDMA: - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. @@ -60,6 +64,8 @@ axi_vdma_0: axivdma@40030000 { xlnx,num-fstores = <0x8>; xlnx,flush-fsync = <0x1>; xlnx,addrwidth = <0x20>; + clocks = <&clk 0>, <&clk 1>, <&clk 2>; + clock-names = "axi_clk", "tx_clk", "txs_clk"; dma-channel@40030000 { compatible = "xlnx,axi-vdma-mm2s-channel"; interrupts = < 0 54 4 >; -- 2.1.2