Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754919AbcDTLng (ORCPT ); Wed, 20 Apr 2016 07:43:36 -0400 Received: from mail-cys01nam02on0064.outbound.protection.outlook.com ([104.47.37.64]:63053 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753036AbcDTLnc (ORCPT ); Wed, 20 Apr 2016 07:43:32 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Kedareswara rao Appana To: , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v2 2/2] dmaengine: vdma: Add clock support Date: Wed, 20 Apr 2016 17:13:19 +0530 Message-ID: <1461152599-28858-2-git-send-email-appanad@xilinx.com> X-Mailer: git-send-email 2.1.2 In-Reply-To: <1461152599-28858-1-git-send-email-appanad@xilinx.com> References: <1461152599-28858-1-git-send-email-appanad@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22272.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(189002)(199003)(52956003)(87936001)(6806005)(92566002)(11100500001)(2201001)(90966002)(1096002)(81166005)(1220700001)(36386004)(106466001)(33646002)(2906002)(50466002)(5003940100001)(586003)(229853001)(47776003)(46386002)(5008740100001)(36756003)(42186005)(103686003)(2950100001)(50226001)(5001770100001)(86362001)(63266004)(48376002)(76176999)(19580395003)(19580405001)(45336002)(4326007)(189998001)(50986999)(4001450100002)(921003)(107986001)(2101003)(83996005)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1NAM02HT050;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;MLV:nov;MX:1;A:1;PTR:xapps1.xilinx.com,unknown-60-100.xilinx.com;LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: fc86732d-95d5-42a2-bd45-08d36910fdf2 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:CY1NAM02HT050; X-Microsoft-Antispam-PRVS: <30235c5dd65f4845b846119d3fd8d849@CY1NAM02HT050.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(9101521040)(601004)(2401047)(13024025)(13018025)(8121501046)(13015025)(13017025)(5005006)(13023025)(10201501046)(3002001);SRVR:CY1NAM02HT050;BCL:0;PCL:0;RULEID:;SRVR:CY1NAM02HT050; X-Forefront-PRVS: 0918748D70 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Apr 2016 11:43:28.2183 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT050 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3524 Lines: 129 Added basic clock support. The clocks are requested at probe and released at remove. Signed-off-by: Kedareswara rao Appana --- Changes for v2: --> None. drivers/dma/xilinx/xilinx_vdma.c | 56 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/drivers/dma/xilinx/xilinx_vdma.c b/drivers/dma/xilinx/xilinx_vdma.c index 70caea6..d526029 100644 --- a/drivers/dma/xilinx/xilinx_vdma.c +++ b/drivers/dma/xilinx/xilinx_vdma.c @@ -44,6 +44,7 @@ #include #include #include +#include #include "../dmaengine.h" @@ -352,6 +353,8 @@ struct xilinx_dma_chan { * @flush_on_fsync: Flush on frame sync * @ext_addr: Indicates 64 bit addressing is supported by dma device * @dmatype: DMA ip type + * @clks: pointer to array of clocks + * @numclks: number of clocks available */ struct xilinx_dma_device { void __iomem *regs; @@ -362,6 +365,8 @@ struct xilinx_dma_device { u32 flush_on_fsync; bool ext_addr; enum xdma_ip_type dmatype; + struct clk **clks; + int numclks; }; /* Macros */ @@ -1731,6 +1736,26 @@ int xilinx_vdma_channel_set_config(struct dma_chan *dchan, } EXPORT_SYMBOL(xilinx_vdma_channel_set_config); +static int xdma_clk_init(struct xilinx_dma_device *xdev, bool enable) +{ + int i = 0, ret; + + for (i = 0; i < xdev->numclks; i++) { + if (enable) { + ret = clk_prepare_enable(xdev->clks[i]); + if (ret) { + dev_err(xdev->dev, + "failed to enable the axidma clock\n"); + return ret; + } + } else { + clk_disable_unprepare(xdev->clks[i]); + } + } + + return 0; +} + /* ----------------------------------------------------------------------------- * Probe and remove */ @@ -1919,6 +1944,7 @@ static int xilinx_dma_probe(struct platform_device *pdev) struct resource *io; u32 num_frames, addr_width; int i, err; + const char *str; /* Allocate and initialize the DMA engine structure */ xdev = devm_kzalloc(&pdev->dev, sizeof(*xdev), GFP_KERNEL); @@ -1965,6 +1991,32 @@ static int xilinx_dma_probe(struct platform_device *pdev) /* Set the dma mask bits */ dma_set_mask(xdev->dev, DMA_BIT_MASK(addr_width)); + xdev->numclks = of_property_count_strings(pdev->dev.of_node, + "clock-names"); + if (xdev->numclks > 0) { + xdev->clks = devm_kmalloc_array(&pdev->dev, xdev->numclks, + sizeof(struct clk *), + GFP_KERNEL); + if (!xdev->clks) + return -ENOMEM; + + for (i = 0; i < xdev->numclks; i++) { + of_property_read_string_index(pdev->dev.of_node, + "clock-names", i, &str); + xdev->clks[i] = devm_clk_get(xdev->dev, str); + if (IS_ERR(xdev->clks[i])) { + if (PTR_ERR(xdev->clks[i]) == -ENOENT) + xdev->clks[i] = NULL; + else + return PTR_ERR(xdev->clks[i]); + } + } + + err = xdma_clk_init(xdev, true); + if (err) + return err; + } + /* Initialize the DMA engine */ xdev->common.dev = &pdev->dev; @@ -2025,6 +2077,8 @@ static int xilinx_dma_probe(struct platform_device *pdev) return 0; error: + if (xdev->numclks > 0) + xdma_clk_init(xdev, false); for (i = 0; i < XILINX_DMA_MAX_CHANS_PER_DEVICE; i++) if (xdev->chan[i]) xilinx_dma_chan_remove(xdev->chan[i]); @@ -2050,6 +2104,8 @@ static int xilinx_dma_remove(struct platform_device *pdev) for (i = 0; i < XILINX_DMA_MAX_CHANS_PER_DEVICE; i++) if (xdev->chan[i]) xilinx_dma_chan_remove(xdev->chan[i]); + if (xdev->numclks > 0) + xdma_clk_init(xdev, false); return 0; } -- 2.1.2