Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755035AbcDTM3V (ORCPT ); Wed, 20 Apr 2016 08:29:21 -0400 Received: from mail-bn1bon0086.outbound.protection.outlook.com ([157.56.111.86]:32320 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754908AbcDTM3S (ORCPT ); Wed, 20 Apr 2016 08:29:18 -0400 Authentication-Results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=caviumnetworks.com; Date: Wed, 20 Apr 2016 14:29:03 +0200 From: Jan Glauber To: Mark Rutland CC: Will Deacon , , Subject: Re: [PATCH v2 1/5] arm64/perf: Basic uncore counter support for Cavium ThunderX Message-ID: <20160420122903.GA3352@hardcore> References: <2588abcb011df6e60cd8212a8583454999180748.1457539622.git.jglauber@cavium.com> <20160419150607.GB20991@leverpostej> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20160419150607.GB20991@leverpostej> User-Agent: Mutt/1.5.21 (2010-09-15) X-Originating-IP: [88.66.108.80] X-ClientProxiedBy: AM3PR07CA0049.eurprd07.prod.outlook.com (10.141.45.177) To SN2PR07MB2589.namprd07.prod.outlook.com (10.167.15.19) X-MS-Office365-Filtering-Correlation-Id: 2055ac13-ba83-4f11-cb89-08d3691762f0 X-Microsoft-Exchange-Diagnostics: 1;SN2PR07MB2589;2:eFa0iRiBxIMhAuXgTytVFr46b2vPdSoyGjtoqXyZiY/TNQQFECEuzZHe7Q9ql3REjpfj6dCr3SY+tMMwn78rGXX75/1qQEWHaBic0S72lOkat5Thtr6FpRZJZ4Y+b9I69UBlmoBdJ7qUyTTLLx3F6L91F3pvxVI7yI0JN6g/Pnud7p7EE0N6z+StFuLmHjTr;3:y6ST/MnvuZL8iomYeGgQtlBE7kRQOfCgRhXCxYXBN+In8/gIsSC3qyBhEK9ANUpiWlZyCq1yzHnNs0BUlrEr52mYZW8+IuKdgDZ3k2LS+tdYtSlxQFRJCZZq8og90D+a X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:SN2PR07MB2589; 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X-Microsoft-Exchange-Diagnostics: 1;SN2PR07MB2589;23:qLGl9w+wpkaH/JiSOOYuZMifyWDIl3sBj9XdXVk2M4GDXwI6r1cB5hrRdvrnapR7Qt16TDHhQ7ny7mnHr6Kd4XPNyngWI704zlFCKiYBm35H8O9Vu+1h72zgODc2dRAes/Dj2WmfLsayk9eYSUDmaLOYoq9p83Y40S8xlgwLR1KMTHGVDmJk40yVwcoIRdtx+P1/LAbFdkmQrPt9QPapcZnH9v/7pGtJDX4fTHp0ZQX8hVvqkxbSAc1BxRLtzTLurXdOmEXGdN9fZsA00QYG9tp8et987B/q2cFkvtzM7F8YpGreuIOrNWiHYkc+Me0LkMJRbXMp+DzVFWN0zGFoJNYOpEWZ1o5EZXZMuRIJyg54L7CPMRJFjn2xW8PhHnna0AT3GLwC3p/j/gzBDKBOeywDTYZQs9LOs6K5l3Slko2zxpV8fl9r6ORZXoMyXwK7pNRW1DBJB8Cd8AToHBXkNc4FPJvq3jWBk1GV9J1p11kPJGvYgPiaksjW4rrSYOg2HlCvap8nQZOkq2jWgCrAd16XZ7G0Fm/hvtNKaql3c2PeLKGnPzUoN9jctcPBodKikVx87sly4LFU+Qwi5C1Tr+9lpVQTs31TNX+q47vyzGnBmajiuLRo0nLqlwNVzgcBHATw+ipi59hI2dIkwQdumCnjcsJhkPJX/9I+bsVy25lXglEJapJrsrsUcvd57n51X9pfHsLJ5EJsR45Zh65OMGB91eX72OfGgO/2N1eC4pO++F0nh4pkeQB90OYdQOJU59qbojhTnQjx4Mugi+Cr4Qqk29NgcjA7n+Q9jf+U3/o5k5yyHuqCp9EHHrraP1oe/EKmpIDLG8C4tQJ52OPEdVZhtkCDvKEmS0re4av8zN8HvPDCE2eoCgdIOA3vVWPXhVvvkezgz/MruUguwDLKBBljHMJK32nZvZPhdFSTVo8= X-Microsoft-Exchange-Diagnostics: 1;SN2PR07MB2589;5:iZKiu/PtlyOY4llAvXvkjT2GuQgrEVyt/s/xG5REFj0Vpdox5XosyU0svOFOay42F4IAf8FNRiCUxd89L8aFOo23f/5f3Stpvc9NKJxFpFhxy2e1cEZyJbIZ1/A8DymmiYN79CiBHplO1+pKEghEpe34STvU82Oq4yzPK4AC7wCiVus1wJp2BBQbhpsnj+Fl;24:FEwg2drcIoUBZZXIMo/5/MuLPY5n+IzXQuzXuGnLdysJDVZOyWyEP4YBN0W5v3/+jESPerH6Nn8VYJ1rnzLtXL71ZqQvhMLUZI7iOug7RqY=;7:zvW6ihVUoEFiKS2Rm98cQfZ9ST7PxaqMqOyq6yrAC4nElGr0ifOIMiX3iBNFRCObUSpWhr2BK9pcdmVafsUWWM7D/D5ox5fHsA0oH5GPRBuV3EzJRUknFo9n+mhgr2DyFZgEg1pgKbMUGVpl9UN2oaqcFCzK8Og69GsOh1O+0QqxdYRz4thTQtPO/wIcofPI9N5bP3bTvfpcwtwU8IylahVac+ArL4ZbRYEwela3qKo= SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Apr 2016 12:29:14.4796 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN2PR07MB2589 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2514 Lines: 56 On Tue, Apr 19, 2016 at 04:06:08PM +0100, Mark Rutland wrote: > On Wed, Mar 09, 2016 at 05:21:03PM +0100, Jan Glauber wrote: > > Provide "uncore" facilities for different non-CPU performance > > counter units. Based on Intel/AMD uncore pmu support. > > > > The uncore drivers cover quite different functionality including > > L2 Cache, memory controllers and interconnects. > > > > The uncore PMUs can be found under /sys/bus/event_source/devices. > > All counters are exported via sysfs in the corresponding events > > files under the PMU directory so the perf tool can list the event names. > > > > There are some points that are special in this implementation: > > > > 1) The PMU detection relies on PCI device detection. If a > > matching PCI device is found the PMU is created. The code can deal > > with multiple units of the same type, e.g. more than one memory > > controller. > > Note: There is also a CPUID check to determine the CPU variant, > > this is needed to support different hardware versions that use > > the same PCI IDs. > > > > 2) Counters are summarized across different units of the same type > > on one NUMA node. > > For instance L2C TAD 0..7 are presented as a single counter > > (adding the values from TAD 0 to 7). Although losing the ability > > to read a single value the merged values are easier to use. > > Merging within a NUMA node, but no further seems a little arbitrary. > > > 3) NUMA support. The device node id is used to group devices by node > > so counters on one node can be merged. The NUMA node can be selected > > via a new sysfs node attribute. > > Without NUMA support all devices will be on node 0. > > It doesn't seem great that this depends on kernel configuration (which > is independent of HW configuration). It seems confusing for the user, > and fragile. > > Do we not have access to another way of grouping cores (e.g. a socket > ID), that's independent of kernel configuration? That seems to be how > the x86 uncore PMUs are handled. I'm not sure how relevant the use case of a multi-node system without CONFIG_NUMA is, but maybe we can get the socket ID from the multiprocessor affinity register (MPIDR_EL1)? The AFF2 part (bits 23:16) should contain the socket number on ThunderX. Would that be better? thanks, Jan > If we don't have that information, it really feels like we need > additional info from FW (which would also solve the CPUID issue with > point 1), or this is likely to be very fragile.