Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755043AbcDTOxt (ORCPT ); Wed, 20 Apr 2016 10:53:49 -0400 Received: from mail-ob0-f170.google.com ([209.85.214.170]:36432 "EHLO mail-ob0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754585AbcDTOxr (ORCPT ); Wed, 20 Apr 2016 10:53:47 -0400 MIME-Version: 1.0 In-Reply-To: <1461068317-28016-8-git-send-email-patrice.chotard@st.com> References: <1461068317-28016-1-git-send-email-patrice.chotard@st.com> <1461068317-28016-8-git-send-email-patrice.chotard@st.com> Date: Wed, 20 Apr 2016 16:53:45 +0200 Message-ID: Subject: Re: [PATCH 7/8] gpio: stmpe: Add STMPE1600 support From: Linus Walleij To: Patrice CHOTARD Cc: Lee Jones , Alexandre Courbot , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Maxime Coquelin , amelie.delaunay@st.com, Shawn Guo , Sascha Hauer , Dinh Nguyen , Viresh Kumar , Shiraz Hashim , Stephen Warren , Thierry Reding Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2896 Lines: 85 On Tue, Apr 19, 2016 at 2:18 PM, wrote: > From: Patrice Chotard > > The particularities of this variant are: > - GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared > to other variants. > - There is no Edge detection, Rising Edge and Falling Edge registers. > - IRQ flags are cleared when read, no need to write in Status register. > > Signed-off-by: Amelie DELAUNAY > Signed-off-by: Patrice Chotard > - u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); > + u8 reg; > u8 mask = 1 << (offset % 8); > int ret; > > + if (stmpe->partnum == STMPE1600) > + reg = stmpe->regs[STMPE_IDX_GPMR_LSB] + (offset / 8); > + else > + reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); This construct is a bit hard to grasp. Can we think of something more intuitive? Maybe using more code lines but easier to understand. Subtracting the offset is just totally unintuitive in the first place, the STMPE1600 arrangement is much more intuitive. I would prefer if we address the LSB+MSB register explicitly instead of adding or subtracting 1 to the LSB register to get to the MSB register. > + if (stmpe->partnum == STMPE1600) > + reg = stmpe->regs[which] + (offset / 8); > + else > + reg = stmpe->regs[which] - (offset / 8); Same. > + if (stmpe->partnum == STMPE1600) > + reg = stmpe->regs[STMPE_IDX_GPDR_LSB] + (offset / 8); > + else > + reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); Same. > + if (stmpe->partnum == STMPE1600) > + reg = stmpe->regs[STMPE_IDX_GPDR_LSB] + (offset / 8); > + else > + reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); Same. > + stmpe_reg_write(stmpe, > + stmpe->regs[regmap[i]] + j, > + new); > + else > + stmpe_reg_write(stmpe, > + stmpe->regs[regmap[i]] - j, > + new); This is also unintuitively backwards. > + if (stmpe->partnum == STMPE1600) > + dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB] + (offset / 8); > + else > + dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); Same. > + if (stmpe->partnum == STMPE1600) > + statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_LSB]; > + else > + statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_MSB]; And this kind of points at the problem. Can we write this in some way that make it super-clear which register we're using and why? Yours, Linus Walleij