Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753408AbcDURN2 (ORCPT ); Thu, 21 Apr 2016 13:13:28 -0400 Received: from mail-bl2nam02on0058.outbound.protection.outlook.com ([104.47.38.58]:9184 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752430AbcDURN0 (ORCPT ); Thu, 21 Apr 2016 13:13:26 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Appana Durga Kedareswara Rao To: Soren Brinkmann CC: Soren Brinkmann , "robh+dt@kernel.org" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , Michal Simek , "vinod.koul@intel.com" , "dan.j.williams@intel.com" , "moritz.fischer@ettus.com" , "laurent.pinchart@ideasonboard.com" , "luis@debethencourt.com" , Anirudha Sarangi , Punnaiah Choudary Kalluri , Shubhrajyoti Datta , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "dmaengine@vger.kernel.org" Subject: RE: [PATCH v3 3/3] dmaengine: vdma: Add clock support Thread-Topic: [PATCH v3 3/3] dmaengine: vdma: Add clock support Thread-Index: AQHRm7oBw54uslpveEWBfoSSWvBadJ+UFkSAgACHnpD//4OpgIAAiGHQ Date: Thu, 21 Apr 2016 17:13:18 +0000 Message-ID: References: <1461235118-800-1-git-send-email-appanad@xilinx.com> <1461235118-800-4-git-send-email-appanad@xilinx.com> <20160421162153.GZ7128@xsjsorenbubuntu> <20160421170215.GB7128@xsjsorenbubuntu> In-Reply-To: <20160421170215.GB7128@xsjsorenbubuntu> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.228.198] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22274.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(377454003)(24454002)(199003)(189002)(13464003)(377424004)(2920100001)(102836003)(6116002)(2950100001)(2900100001)(4001450100002)(586003)(87936001)(2906002)(3846002)(5250100002)(86362001)(50986999)(33656002)(11100500001)(54356999)(5003600100002)(23676002)(106466001)(19580405001)(47776003)(15975445007)(92566002)(50466002)(19580395003)(55846006)(5008740100001)(4326007)(106116001)(19273905006)(63266004)(6806005)(1220700001)(93886004)(5004730100002)(1096002)(81166005)(189998001)(76176999)(107986001)(563064011);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT015;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;MLV:sfv;A:1;MX:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: 25a9a8e6-ec9c-4f86-df7e-08d36a083ec5 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:SN1NAM02HT015; X-Microsoft-Antispam-PRVS: <3c4c38fe0db34fcba647f9b715dd2271@SN1NAM02HT015.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(9101521026)(601004)(2401047)(13017025)(8121501046)(13015025)(13018025)(13024025)(13023025)(5005006)(10201501046)(3002001);SRVR:SN1NAM02HT015;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT015; X-Forefront-PRVS: 091949432C X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Apr 2016 17:13:22.8715 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT015 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u3LHDXjh011298 Content-Length: 4065 Lines: 94 Hi Soren, > -----Original Message----- > From: Sören Brinkmann [mailto:soren.brinkmann@xilinx.com] > Sent: Thursday, April 21, 2016 10:32 PM > To: Appana Durga Kedareswara Rao > Cc: Soren Brinkmann ; robh+dt@kernel.org; > pawel.moll@arm.com; mark.rutland@arm.com; ijc+devicetree@hellion.org.uk; > galak@codeaurora.org; Michal Simek ; > vinod.koul@intel.com; dan.j.williams@intel.com; moritz.fischer@ettus.com; > laurent.pinchart@ideasonboard.com; luis@debethencourt.com; Anirudha > Sarangi ; Punnaiah Choudary Kalluri > ; Shubhrajyoti Datta ; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; dmaengine@vger.kernel.org > Subject: Re: [PATCH v3 3/3] dmaengine: vdma: Add clock support > > On Thu, 2016-04-21 at 09:32:44 -0700, Appana Durga Kedareswara Rao wrote: > > Hi Soren, > > > > > -----Original Message----- > > > From: Sören Brinkmann [mailto:soren.brinkmann@xilinx.com] > > > Sent: Thursday, April 21, 2016 9:52 PM > > > To: Appana Durga Kedareswara Rao > > > Cc: robh+dt@kernel.org; pawel.moll@arm.com; mark.rutland@arm.com; > > > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; Michal Simek > > > ; vinod.koul@intel.com; dan.j.williams@intel.com; > > > Appana Durga Kedareswara Rao ; > > > moritz.fischer@ettus.com; laurent.pinchart@ideasonboard.com; > > > luis@debethencourt.com; Anirudha Sarangi ; Punnaiah > > > Choudary Kalluri ; Shubhrajyoti Datta > > > ; devicetree@vger.kernel.org; linux-arm- > > > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > > > dmaengine@vger.kernel.org > > > Subject: Re: [PATCH v3 3/3] dmaengine: vdma: Add clock support > > > > > > On Thu, 2016-04-21 at 16:08:38 +0530, Kedareswara rao Appana wrote: > [...] > > > > @@ -1757,6 +1767,200 @@ static void xilinx_dma_chan_remove(struct > > > xilinx_dma_chan *chan) > > > > list_del(&chan->common.device_node); > > > > } > > > > > > > > +static int axidma_clk_init(struct platform_device *pdev, struct clk > **axi_clk, > > > > + struct clk **tx_clk, struct clk **rx_clk, > > > > + struct clk **sg_clk, struct clk **tmp_clk) { > > > > + int err; > > > > + > > > > + *tmp_clk = NULL; > > > > + > > > > + *axi_clk = devm_clk_get(&pdev->dev, "s_axi_lite_aclk"); > > > > + if (IS_ERR(*axi_clk)) { > > > > + err = PTR_ERR(*axi_clk); > > > > + dev_err(&pdev->dev, "failed to get axi_aclk (%u)\n", err); > > > > + return err; > > > > + } > > > > + > > > > + *tx_clk = devm_clk_get(&pdev->dev, "m_axi_mm2s_aclk"); > > > > + if (IS_ERR(*tx_clk)) > > > > + *tx_clk = NULL; > > > > + > > > > + *rx_clk = devm_clk_get(&pdev->dev, "m_axi_s2mm_aclk"); > > > > + if (IS_ERR(*rx_clk)) > > > > + *rx_clk = NULL; > > > > + > > > > + *sg_clk = devm_clk_get(&pdev->dev, "m_axi_sg_aclk"); > > > > + if (IS_ERR(*sg_clk)) > > > > + *sg_clk = NULL; > > > > + > > > > + > > > > + err = clk_prepare_enable(*axi_clk); > > > > > > Should this be called if you know that the pointer might be NULL? > > > > It is a mandatory clock and if this clk is not there in DT I am already returning > error... > > I didn't get your question could you please elaborate??? > > But for all the optional clocks. They could all be NULL and you're calling > clk_prepare_enable with a NULL pointer. That function is nice enough to > do a NULL check for you, but I wonder whether these calls should happen at > all when you already know that the pointer is not a valid clock. I referred macb driver http://lxr.free-electrons.com/source/drivers/net/ethernet/cadence/macb.c There tx_clk is optional and in this driver they are calling clk_prepare_enable for the optional clocks. Please let me know if you are ok to call the clk_prepare_enable() for optional clocks with a NULL pointer. Will fix rest of the comments and will send next version of the patch... Regards, Kedar. > > Sören