Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752287AbcDUUSP (ORCPT ); Thu, 21 Apr 2016 16:18:15 -0400 Received: from down.free-electrons.com ([37.187.137.238]:45257 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751571AbcDUUSO convert rfc822-to-8bit (ORCPT ); Thu, 21 Apr 2016 16:18:14 -0400 Date: Thu, 21 Apr 2016 22:18:11 +0200 From: Boris Brezillon To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Cc: linux-mtd@lists.infradead.org, Mikael Starvik , Jesper Nilsson , Brian Norris , linux-cris-kernel@axis.com (open list:CRIS PORT), linux-kernel@vger.kernel.org (open list) Subject: Re: [PATCH V3 04/11] CRIS v32: nand: set ECC algorithm explicitly Message-ID: <20160421221811.3e8dcdff@bbrezillon> In-Reply-To: <1460926387-9563-5-git-send-email-zajec5@gmail.com> References: <1460913104-27388-1-git-send-email-zajec5@gmail.com> <1460926387-9563-1-git-send-email-zajec5@gmail.com> <1460926387-9563-5-git-send-email-zajec5@gmail.com> X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1802 Lines: 51 On Sun, 17 Apr 2016 22:53:00 +0200 Rafał Miłecki wrote: > This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to > enum nand_ecc_algo). > > Signed-off-by: Rafał Miłecki Mikael, Jesper, could you review/ack this patch? I'd like to take it into the nand tree to avoid any dependency problems. Thanks, Boris > --- > arch/cris/arch-v32/drivers/mach-a3/nandflash.c | 1 + > arch/cris/arch-v32/drivers/mach-fs/nandflash.c | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c > index 5aa3f51..3f646c7 100644 > --- a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c > +++ b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c > @@ -157,6 +157,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) > /* 20 us command delay time */ > this->chip_delay = 20; > this->ecc.mode = NAND_ECC_SOFT; > + this->ecc.algo = NAND_ECC_HAMMING; > > /* Enable the following for a flash based bad block table */ > /* this->bbt_options = NAND_BBT_USE_FLASH; */ > diff --git a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c > index a7c17b0..a745405 100644 > --- a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c > +++ b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c > @@ -148,6 +148,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) > /* 20 us command delay time */ > this->chip_delay = 20; > this->ecc.mode = NAND_ECC_SOFT; > + this->ecc.algo = NAND_ECC_HAMMING; > > /* Enable the following for a flash based bad block table */ > /* this->bbt_options = NAND_BBT_USE_FLASH; */ -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com