From: Minghuan Lian <minghuan.lian@nxp.com>
To: Marc Zyngier <marc.zyngier@arm.com>, Leo Li <pku.leo@gmail.com>
CC: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
        lkml <linux-kernel@vger.kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>, Roy Zang <roy.zang@nxp.com>,
        Mingkai Hu <mingkai.hu@nxp.com>, Stuart Yoder <stuart.yoder@nxp.com>,
        Yang-Leo Li <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <Mark.Rutland@arm.com>
Subject: RE: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller
 support
Thread-Topic: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller
 support
Thread-Index: AQHReCJYxdpiemRZC0yR/i00fweC8p9NvUGAgEgDcgCAACRLAIAAAooQ
Date: Fri, 22 Apr 2016 07:53:46 +0000
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Hi Marc,

Please see the link:
https://patchwork.kernel.org/patch/8649241/

Rob Herring has given the ACK.

I have submitted the v6 patch:  https://patchwork.kernel.org/patch/8649251/
Please apply the latest the patch after you review.

Thank you very much.


Regard,
Minghuan


> -----Original Message-----
> From: Marc Zyngier [mailto:marc.zyngier@arm.com]
> Sent: Friday, April 22, 2016 3:43 PM
> To: Leo Li <pku.leo@gmail.com>
> Cc: Minghuan Lian <minghuan.lian@nxp.com>;
> linux-arm-kernel@lists.infradead.org; lkml <linux-kernel@vger.kernel.org>;
> Thomas Gleixner <tglx@linutronix.de>; Jason Cooper
> <jason@lakedaemon.net>; Roy Zang <roy.zang@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; Stuart Yoder <stuart.yoder@nxp.com>; Yang-Leo Li
> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Mark Rutland
> <Mark.Rutland@arm.com>
> Subject: Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller
> support
> 
> On 22/04/16 06:33, Leo Li wrote:
> > On Mon, Mar 7, 2016 at 3:50 AM, Marc Zyngier <marc.zyngier@arm.com>
> wrote:
> >> On Mon, 7 Mar 2016 11:36:22 +0800
> >> Minghuan Lian <Minghuan.Lian@nxp.com> wrote:
> >>
> >>> Some kind of NXP Layerscape SoC provides a MSI
> >>> implementation which uses two SCFG registers MSIIR and
> >>> MSIR to support 32 MSI interrupts for each PCIe controller.
> >>> The patch is to support it.
> >>>
> >>> Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
> >>
> >> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> >>
> >> The DT binding still needs an Ack from the DT maintainers though (cc'd).
> >
> > Marc,
> >
> > Who will be responsible to pick this driver?  I see you are also one
> > of the maintainers for irqchip.  Can you pick up the driver?  The
> > binding has already gotten ACKed by the device tree maintainer.
> 
> Can you point me to this Ack? I can't see any trace of it in my Inbox.
> 
> Thanks,
> 
> 	M.
> --
> Jazz is not dead. It just smells funny...