Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752424AbcDVLoa (ORCPT ); Fri, 22 Apr 2016 07:44:30 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:2465 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751735AbcDVLo1 (ORCPT ); Fri, 22 Apr 2016 07:44:27 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Fri, 22 Apr 2016 04:44:16 -0700 Subject: Re: [PATCH 10/11] arm64: tegra: Add clock properties on cpu0 for Tegra210 To: Penny Chiu , , , , , , , References: <1461321071-6431-1-git-send-email-pchiu@nvidia.com> <1461321071-6431-11-git-send-email-pchiu@nvidia.com> CC: , , , , , , , From: Jon Hunter Message-ID: <571A0E95.9040203@nvidia.com> Date: Fri, 22 Apr 2016 12:44:21 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <1461321071-6431-11-git-send-email-pchiu@nvidia.com> X-Originating-IP: [10.21.132.108] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1645 Lines: 47 Hi Penny, On 22/04/16 11:31, Penny Chiu wrote: > Add clocks, clock-names, and clock-latency into cpu0 node. > These properties will be used by cpufreq driver. > > Signed-off-by: Penny Chiu > --- > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > index 204d9cd..1a85857 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > @@ -782,6 +782,12 @@ > device_type = "cpu"; > compatible = "arm,cortex-a57"; > reg = <0>; > + clocks = <&tegra_car TEGRA210_CLK_CCLK_G>, > + <&tegra_car TEGRA210_CLK_PLL_X>, > + <&tegra_car TEGRA210_CLK_PLL_P_OUT4>, > + <&dfll>; > + clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; > + clock-latency = <300000>; > }; > > cpu@1 { > Can you include a patch with this series to update the binding documentation for the nvidia,tegra124-cpufreq.txt? I think that although there is no specific nvidia,tegra210-cpufreq compatible string the documentation should state that both tegra124 and tegra210 are supported so it is clear. Also I see the above binding no longer includes the "cpu_lp" for tegra210 which I understand we don't use here. However, the binding documentation should reflect this. Having said that, looking at the driver it appears the "cpu_lp" clock is not even used for tegra124. I wonder if we should drop this from the binding documentation and the tegra124.dtsi altogether? What about the "vdd-cpu-supply" property? Don't we need this? Cheers Jon