Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753508AbcDYA0m (ORCPT ); Sun, 24 Apr 2016 20:26:42 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:32846 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753390AbcDYA0j (ORCPT ); Sun, 24 Apr 2016 20:26:39 -0400 From: Eric Engestrom To: linux-kernel@vger.kernel.org Cc: Eric Engestrom , Vineet Gupta , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-snps-arc@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH 07/41] Documentation: dt: arc: fix spelling mistakes Date: Mon, 25 Apr 2016 01:24:04 +0100 Message-Id: <1461543878-3639-8-git-send-email-eric@engestrom.ch> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1461543878-3639-1-git-send-email-eric@engestrom.ch> References: <1461543878-3639-1-git-send-email-eric@engestrom.ch> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1524 Lines: 34 Signed-off-by: Eric Engestrom --- Documentation/devicetree/bindings/arc/archs-pct.txt | 2 +- Documentation/devicetree/bindings/arc/pct.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arc/archs-pct.txt b/Documentation/devicetree/bindings/arc/archs-pct.txt index 1ae98b87..e4b9dce 100644 --- a/Documentation/devicetree/bindings/arc/archs-pct.txt +++ b/Documentation/devicetree/bindings/arc/archs-pct.txt @@ -2,7 +2,7 @@ The ARC HS can be configured with a pipeline performance monitor for counting CPU and cache events like cache misses and hits. Like conventional PCT there -are 100+ hardware conditions dynamically mapped to upto 32 counters. +are 100+ hardware conditions dynamically mapped to up to 32 counters. It also supports overflow interrupts. Required properties: diff --git a/Documentation/devicetree/bindings/arc/pct.txt b/Documentation/devicetree/bindings/arc/pct.txt index 7b95884..4e874d9 100644 --- a/Documentation/devicetree/bindings/arc/pct.txt +++ b/Documentation/devicetree/bindings/arc/pct.txt @@ -2,7 +2,7 @@ The ARC700 can be configured with a pipeline performance monitor for counting CPU and cache events like cache misses and hits. Like conventional PCT there -are 100+ hardware conditions dynamically mapped to upto 32 counters +are 100+ hardware conditions dynamically mapped to up to 32 counters Note that: * The ARC 700 PCT does not support interrupts; although HW events may be -- 2.8.0