Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754363AbcDYKL7 (ORCPT ); Mon, 25 Apr 2016 06:11:59 -0400 Received: from down.free-electrons.com ([37.187.137.238]:52532 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754334AbcDYKL5 convert rfc822-to-8bit (ORCPT ); Mon, 25 Apr 2016 06:11:57 -0400 Date: Mon, 25 Apr 2016 12:11:53 +0200 From: Boris Brezillon To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Rob Herring Cc: linux-mtd@lists.infradead.org, Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Richard Weinberger , David Woodhouse , Brian Norris , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: Re: [PATCH 1/3] mtd: nand: add support for "nand-ecc-algo" DT property Message-ID: <20160425121153.7c56ad87@bbrezillon> In-Reply-To: <1461324197-1333-1-git-send-email-zajec5@gmail.com> References: <1461324197-1333-1-git-send-email-zajec5@gmail.com> X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2704 Lines: 79 On Fri, 22 Apr 2016 13:23:13 +0200 Rafał Miłecki wrote: > So far it was only possible to specify ECC algorithm using "soft" and > "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify > it for a hardware ECC mode. > > Now that we have independent field in NAND subsystem for storing info > about ECC algorithm we may also add support for this new DT property. > > Signed-off-by: Rafał Miłecki > --- > Documentation/devicetree/bindings/mtd/nand.txt | 2 ++ > drivers/mtd/nand/nand_base.c | 20 +++++++++++++------- > 2 files changed, 15 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt > index a17662b..5ac4ab7 100644 > --- a/Documentation/devicetree/bindings/mtd/nand.txt > +++ b/Documentation/devicetree/bindings/mtd/nand.txt > @@ -22,6 +22,8 @@ Optional NAND chip properties: > - nand-ecc-mode : String, operation mode of the NAND ecc mode. > Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", > "soft_bch". > +- nand-ecc-algo: string, algorithm of NAND ECC. > + Supported values are: "hamming", "bch". Rob, any objection to this binding change (and the one in patch 3). Please note that everything is backward compatible. Thanks, Boris > - nand-bus-width : 8 or 16 bus width if not present 8 > - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false > > diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c > index 7bc37b4..a5417a0 100644 > --- a/drivers/mtd/nand/nand_base.c > +++ b/drivers/mtd/nand/nand_base.c > @@ -4003,17 +4003,23 @@ static int of_get_nand_ecc_mode(struct device_node *np) > return -ENODEV; > } > > +static const char * const nand_ecc_algos[] = { > + [NAND_ECC_HAMMING] = "hamming", > + [NAND_ECC_BCH] = "bch", > +}; > + > static int of_get_nand_ecc_algo(struct device_node *np) > { > const char *pm; > - int err; > + int err, i; > > - /* > - * TODO: Read ECC algo OF property and map it to enum nand_ecc_algo. > - * It's not implemented yet as currently NAND subsystem ignores > - * algorithm explicitly set this way. Once it's handled we should > - * document & support new property. > - */ > + err = of_property_read_string(np, "nand-ecc-algo", &pm); > + if (!err) { > + for (i = 0; i < ARRAY_SIZE(nand_ecc_algos); i++) > + if (!strcasecmp(pm, nand_ecc_algos[i])) > + return i; > + return -ENODEV; > + } > > /* > * For backward compatibility we also read "nand-ecc-mode" checking -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com