Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932918AbcDYRhi (ORCPT ); Mon, 25 Apr 2016 13:37:38 -0400 Received: from mga04.intel.com ([192.55.52.120]:9235 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754491AbcDYRhh (ORCPT ); Mon, 25 Apr 2016 13:37:37 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,533,1455004800"; d="scan'208";a="962395806" From: Jarkko Sakkinen To: gregkh@linuxfoundation.org Cc: Kai Huang , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), Borislav Petkov , Andy Lutomirski , Boris Ostrovsky , Huang Rui , Mathias Krause , Wan Zongshun , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)) Subject: [PATCH 1/6] x86: add SGX definition to cpufeature Date: Mon, 25 Apr 2016 20:34:08 +0300 Message-Id: <1461605698-12385-2-git-send-email-jarkko.sakkinen@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1461605698-12385-1-git-send-email-jarkko.sakkinen@linux.intel.com> References: <1461605698-12385-1-git-send-email-jarkko.sakkinen@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 900 Lines: 21 From: Kai Huang Signed-off-by: Kai Huang --- arch/x86/include/asm/cpufeature.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 7ad8c94..f6be49f 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -208,6 +208,7 @@ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */ #define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/ #define X86_FEATURE_TSC_ADJUST ( 9*32+ 1) /* TSC adjustment MSR 0x3b */ +#define X86_FEATURE_SGX ( 9*32+ 2) /* Software Guard Extensions */ #define X86_FEATURE_BMI1 ( 9*32+ 3) /* 1st group bit manipulation extensions */ #define X86_FEATURE_HLE ( 9*32+ 4) /* Hardware Lock Elision */ #define X86_FEATURE_AVX2 ( 9*32+ 5) /* AVX2 instructions */ -- 2.7.4