Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933301AbcDYTEJ (ORCPT ); Mon, 25 Apr 2016 15:04:09 -0400 Received: from mga11.intel.com ([192.55.52.93]:10862 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754934AbcDYTEG (ORCPT ); Mon, 25 Apr 2016 15:04:06 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,533,1455004800"; d="scan'208";a="962446614" Date: Mon, 25 Apr 2016 22:03:56 +0300 From: Jarkko Sakkinen To: Greg KH Cc: Andy Lutomirski , Borislav Petkov , Boris Ostrovsky , "open list:STAGING SUBSYSTEM" , Ingo Molnar , Kristen Carlson Accardi , "open list:DOCUMENTATION" , open list , Mathias Krause , Thomas Gleixner , Wan Zongshun Subject: Re: [PATCH 0/6] Intel Secure Guard Extensions Message-ID: <20160425190356.GD15368@intel.com> References: <1461605698-12385-1-git-send-email-jarkko.sakkinen@linux.intel.com> <20160425175352.GA16786@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160425175352.GA16786@kroah.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1761 Lines: 46 On Mon, Apr 25, 2016 at 10:53:52AM -0700, Greg KH wrote: > On Mon, Apr 25, 2016 at 08:34:07PM +0300, Jarkko Sakkinen wrote: > > Intel(R) SGX is a set of CPU instructions that can be used by > > applications to set aside private regions of code and data. The code > > outside the enclave is disallowed to access the memory inside the > > enclave by the CPU access control. > > > > The firmware uses PRMRR registers to reserve an area of physical memory > > called Enclave Page Cache (EPC). There is a hardware unit in the > > processor called Memory Encryption Engine. The MEE encrypts and decrypts > > the EPC pages as they enter and leave the processor package. > > > > Jarkko Sakkinen (5): > > x86, sgx: common macros and definitions > > intel_sgx: driver for Intel Secure Guard eXtensions > > intel_sgx: ptrace() support for the driver > > intel_sgx: driver documentation > > intel_sgx: TODO file for the staging area > > > > Kai Huang (1): > > x86: add SGX definition to cpufeature > > > > Documentation/x86/intel_sgx.txt | 86 +++ > > arch/x86/include/asm/cpufeature.h | 1 + > > arch/x86/include/asm/sgx.h | 253 +++++++ > > Why are you asking for this to go into staging? > > What is keeping it out of the "real" part of the kernel tree? Now that I think of it nothing as long as the API is fixed the way you suggested and my TODO list is cleared. I think I prepare a new version of the patches and point it directly to arch/x86. > And staging code is self-contained, putting files in arch/* isn't ok for > it, which kind of implies that you should get this merged correctly. > > I need a lot more information here before I can take this code... > > thanks, > > greg k-h /Jarkko