Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752547AbcDZPby (ORCPT ); Tue, 26 Apr 2016 11:31:54 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:53170 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752246AbcDZPbw (ORCPT ); Tue, 26 Apr 2016 11:31:52 -0400 Subject: Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and power state of io pads To: Laxman Dewangan , Linus Walleij References: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> <1460473007-11535-8-git-send-email-ldewangan@nvidia.com> <5710A8A4.90309@nvidia.com> <5710BA75.2010503@nvidia.com> <5710D4E2.2030801@nvidia.com> <571F6DE5.5020605@nvidia.com> Cc: Thierry Reding , Alexandre Courbot , Rob Herring , Mark Rutland , Jon Hunter , "linux-tegra@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" From: Stephen Warren Message-ID: <571F89E3.1040907@wwwdotorg.org> Date: Tue, 26 Apr 2016 09:31:47 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <571F6DE5.5020605@nvidia.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2093 Lines: 50 On 04/26/2016 07:32 AM, Laxman Dewangan wrote: > > On Friday 15 April 2016 05:17 PM, Laxman Dewangan wrote: >> >> On Friday 15 April 2016 04:45 PM, Linus Walleij wrote: >>> On Fri, Apr 15, 2016 at 11:55 AM, Laxman Dewangan >>> wrote: >>>> On Friday 15 April 2016 02:55 PM, Linus Walleij wrote: >>>>> If the pin could actually set a voltage level it would have a >>>>> regulator. >>>>> I don't believe that. I think it is selecting one of two rails which >>>>> could theoretically hold two totally different voltages. >>>>> >>>>> And that is what power-source is about. >>>> The IO rails connected to PMIC rail and connection does not get change. >>>> We change the voltage of PMIC rails via regulator calls. And then >>>> configure >>>> pads for the new voltage. >>> Aha I get it! So you adjust something in the I/O-cell so that it is >>> adapted >>> for the new voltage. >>> >>> OK that seems to be something new. I suspect >>> power-voltage-select = ; where N i in uV would solve this? >>> (We should use uV since regulators use this.) >> >> Thanks for new property. I will make the unit and type same as the >> regulator framework. > > We have the ops for configuring the pin config as > > int (*pin_config_group_set) (struct pinctrl_dev *pctldev, > unsigned selector, > unsigned long *configs, > unsigned num_configs); > > > The config is 32 bit, upper 16 for config argument and and lower 16 for > the config param. > > So we can not accommodate 3300000uV until we change it to mV i.e. 3300mV. > > So on interface, we can read uV from DT but when making config, we can > translate it to mV before passing to pin_config_group_set. A SoC-specific enum would make more sense. It would avoid any translation. There's no need for a generic value since the available set of options is SoC-specific, the data source is SoC-specific, and there's no need for any code besides the SoC-specific driver to interpret the value in any way at all.