Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752803AbcDZW4K (ORCPT ); Tue, 26 Apr 2016 18:56:10 -0400 Received: from mail-bl2on0079.outbound.protection.outlook.com ([65.55.169.79]:17915 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752249AbcDZW4G (ORCPT ); Tue, 26 Apr 2016 18:56:06 -0400 X-Greylist: delayed 629 seconds by postgrey-1.27 at vger.kernel.org; Tue, 26 Apr 2016 18:56:05 EDT Authentication-Results: vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; From: Tom Lendacky Subject: [RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD) To: , , , , , , , , CC: Radim =?utf-8?b?S3LEjW3DocWZ?= , Arnd Bergmann , Jonathan Corbet , Matt Fleming , Joerg Roedel , "Konrad Rzeszutek Wilk" , Paolo Bonzini , "Ingo Molnar" , Borislav Petkov , "H. Peter Anvin" , Andrey Ryabinin , "Alexander Potapenko" , Thomas Gleixner , "Dmitry Vyukov" Date: Tue, 26 Apr 2016 17:55:53 -0500 Message-ID: <20160426225553.13567.19459.stgit@tlendack-t1.amdoffice.net> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: CY1PR13CA0003.namprd13.prod.outlook.com (10.162.30.141) To BY2PR1201MB1109.namprd12.prod.outlook.com (10.164.168.17) X-MS-Office365-Filtering-Correlation-Id: 1ff68a61-f1f3-4e42-f3d7-08d36e25ef18 X-Microsoft-Exchange-Diagnostics: 1;BY2PR1201MB1109;2:ECSsl7utYMralv6wx8Y1LrOuCIc+MqyBW0y/CjO/G76LafYKPfmI4qZImVXFQGtks897tWzNmybhYN+Ged0FKBREdkXCBEFJ8ZPx7GFpCI0xh/tuBmDyKUvY+KscilC5ulMuDPse16ME8wzWTI+8OgQAaCRDd84bRGgTFoor+tZAUmXgeZ0J1YieTO2Sz7XN;3:j0xw9msR6wOJrxsBcyKpexB41/UdMD13v2xp3bGWMoAlSTVDD+8WSHcq/2FR1XZ+uIxC6yb1iUajpc70tk/RfWVBKd/ujWNdX8xf6D5Wxy9KHEyCNDC/JzRpJiuY7adk;25:8C2OJxn5xnHv0CRS4MZA9Seg5pthrloBhGbanxsmw8B1GFT8w7zBSw+RqnyGuEO0QhSszBppQWfsI5Xv0aCmRpsazWWlfgZOT/bM4snDtLrclx0fTIflWssw+plRe6kzJyrmrcf7J+Ui9gRNFxpdZ6PikWYgYd4Qo7rx8L3Kkpf42Hv6tFgkQ6V32cTt8EKKKnpU0GrDGA7G4eErWHft8Rv2vef5Y2iQqsbe+1IjiSzTqT19RlBL5LWThKNuAFT639gx5XvU1S/cnYKFaw8YssWVFma1oe3QUUMDz21GxEUKWDcQQ+ROGxvu97crNeqP2+SX/pyGkMAsNqL1x/jzPw== X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY2PR1201MB1109; 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SME can be used to mark individual pages of memory as encrypted through the page tables. A page of memory that is marked encrypted will be automatically decrypted when read from DRAM and will be automatically encrypted when written to DRAM. Details on SME can found in the links below. The SME feature is identified through a CPUID function and enabled through the SYSCFG MSR. Once enabled, page table entries will determine how the memory is accessed. If a page table entry has the memory encryption mask set, then that memory will be accessed as encrypted memory. The memory encryption mask (as well as other related information) is determined from settings returned through the same CPUID function that identifies the presence of the feature. The approach that this patch series takes is to encrypt everything possible starting early in the boot where the kernel is encrypted. Using the page table macros the encryption mask can be incorporated into all page table entries and page allocations. By updating the protection map, userspace allocations are also marked encrypted. Certain data must be accounted for as having been placed in memory before SME was enabled (EFI, initrd, etc.) and accessed accordingly. This patch series is a pre-cursor to another AMD processor feature called Secure Encrypted Virtualization (SEV). The support for SEV will build upon the SME support and will be submitted later. Details on SEV can be found in the links below. The following links provide additional detail: AMD Memory Encryption whitepaper: http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/12/AMD_Memory_Encryption_Whitepaper_v7-Public.pdf AMD64 Architecture Programmer's Manual: http://support.amd.com/TechDocs/24593.pdf SME is section 7.10 SEV is section 15.34 This patch series is based off of the master branch of tip. Commit 8d54fcebd9b3 ("Merge branch 'x86/urgent'") --- Tom Lendacky (18): x86: Set the write-protect cache mode for AMD processors x86: Secure Memory Encryption (SME) build enablement x86: Secure Memory Encryption (SME) support x86: Add the Secure Memory Encryption cpu feature x86: Handle reduction in physical address size with SME x86: Provide general kernel support for memory encryption x86: Extend the early_memmap support with additional attrs x86: Add support for early encryption/decryption of memory x86: Insure that memory areas are encrypted when possible x86/efi: Access EFI related tables in the clear x86: Decrypt trampoline area if memory encryption is active x86: Access device tree in the clear x86: DMA support for memory encryption iommu/amd: AMD IOMMU support for memory encryption x86: Enable memory encryption on the APs x86: Do not specify encrypted memory for VGA mapping x86/kvm: Enable Secure Memory Encryption of nested page tables x86: Add support to turn on Secure Memory Encryption Documentation/kernel-parameters.txt | 3 arch/x86/Kconfig | 9 + arch/x86/include/asm/cacheflush.h | 3 arch/x86/include/asm/cpufeature.h | 1 arch/x86/include/asm/cpufeatures.h | 5 arch/x86/include/asm/dma-mapping.h | 5 arch/x86/include/asm/fixmap.h | 16 ++ arch/x86/include/asm/kvm_host.h | 2 arch/x86/include/asm/mem_encrypt.h | 99 ++++++++++ arch/x86/include/asm/msr-index.h | 2 arch/x86/include/asm/pgtable_types.h | 49 +++-- arch/x86/include/asm/processor.h | 3 arch/x86/include/asm/realmode.h | 12 + arch/x86/include/asm/vga.h | 13 + arch/x86/kernel/Makefile | 2 arch/x86/kernel/asm-offsets.c | 2 arch/x86/kernel/cpu/common.c | 2 arch/x86/kernel/cpu/scattered.c | 1 arch/x86/kernel/devicetree.c | 6 - arch/x86/kernel/espfix_64.c | 2 arch/x86/kernel/head64.c | 100 +++++++++- arch/x86/kernel/head_64.S | 42 +++- arch/x86/kernel/machine_kexec_64.c | 2 arch/x86/kernel/mem_encrypt.S | 343 ++++++++++++++++++++++++++++++++++ arch/x86/kernel/pci-dma.c | 11 + arch/x86/kernel/pci-nommu.c | 2 arch/x86/kernel/pci-swiotlb.c | 8 + arch/x86/kernel/setup.c | 14 + arch/x86/kernel/x8664_ksyms_64.c | 6 + arch/x86/kvm/mmu.c | 7 - arch/x86/kvm/vmx.c | 2 arch/x86/kvm/x86.c | 3 arch/x86/mm/Makefile | 1 arch/x86/mm/fault.c | 5 arch/x86/mm/ioremap.c | 31 +++ arch/x86/mm/kasan_init_64.c | 4 arch/x86/mm/mem_encrypt.c | 201 ++++++++++++++++++++ arch/x86/mm/pageattr.c | 78 ++++++++ arch/x86/mm/pat.c | 11 + arch/x86/platform/efi/efi.c | 26 +-- arch/x86/platform/efi/efi_64.c | 9 + arch/x86/platform/efi/quirks.c | 12 + arch/x86/realmode/init.c | 13 + arch/x86/realmode/rm/trampoline_64.S | 14 + drivers/firmware/efi/efi.c | 18 +- drivers/firmware/efi/esrt.c | 12 + drivers/iommu/amd_iommu.c | 10 + include/asm-generic/early_ioremap.h | 2 include/linux/efi.h | 3 include/linux/swiotlb.h | 1 init/main.c | 6 + lib/swiotlb.c | 64 ++++++ mm/early_ioremap.c | 15 + 53 files changed, 1217 insertions(+), 96 deletions(-) create mode 100644 arch/x86/include/asm/mem_encrypt.h create mode 100644 arch/x86/kernel/mem_encrypt.S create mode 100644 arch/x86/mm/mem_encrypt.c -- Tom Lendacky