Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753293AbcD0JdE (ORCPT ); Wed, 27 Apr 2016 05:33:04 -0400 Received: from tartarus.angband.pl ([89.206.35.136]:42474 "EHLO tartarus.angband.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752207AbcD0JdC (ORCPT ); Wed, 27 Apr 2016 05:33:02 -0400 Date: Wed, 27 Apr 2016 11:32:51 +0200 From: Adam Borowski To: Ingo Molnar Cc: linux-kernel@vger.kernel.org, Stephane Eranian , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Borislav Petkov Subject: Re: [PATCH] perf/x86/amd: Explicitly define PERF_COUNT_HW_REF_CPU_CYCLES as undefined. Message-ID: <20160427093251.GA13534@angband.pl> References: <1461719993-12461-1-git-send-email-kilobyte@angband.pl> <20160427080345.GB16991@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160427080345.GB16991@gmail.com> X-Junkbait: aaron@angband.pl, zzyx@angband.pl User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: X-SA-Exim-Mail-From: kilobyte@angband.pl X-SA-Exim-Scanned: No (on tartarus.angband.pl); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 907 Lines: 21 On Wed, Apr 27, 2016 at 10:03:45AM +0200, Ingo Molnar wrote: > * Adam Borowski wrote: > > diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c > > index 86a9bec..5fa1b8e 100644 > > --- a/arch/x86/events/amd/core.c > > +++ b/arch/x86/events/amd/core.c > > @@ -125,6 +125,7 @@ static const u64 amd_perfmon_event_map[] = > > [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3, > > [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00d0, /* "Decoder empty" event */ > > [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x00d1, /* "Dispatch stalls" event */ > > + [PERF_COUNT_HW_REF_CPU_CYCLES] = 0, > > }; > > Hm, I think it would be cleaner and more robust to change this (and all other > similar, if any) arrays to [PERF_COUNT_HW_MAX] instead. Good idea! Both of Intel's copies (one for p4, one for core+) already set the size this way. -- A tit a day keeps the vet away.