Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753438AbcD0Odr (ORCPT ); Wed, 27 Apr 2016 10:33:47 -0400 Received: from mail-ob0-f172.google.com ([209.85.214.172]:33239 "EHLO mail-ob0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752778AbcD0Odl (ORCPT ); Wed, 27 Apr 2016 10:33:41 -0400 MIME-Version: 1.0 In-Reply-To: <20160426225604.13567.55443.stgit@tlendack-t1.amdoffice.net> References: <20160426225553.13567.19459.stgit@tlendack-t1.amdoffice.net> <20160426225604.13567.55443.stgit@tlendack-t1.amdoffice.net> From: Andy Lutomirski Date: Wed, 27 Apr 2016 07:33:21 -0700 Message-ID: Subject: Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors To: Tom Lendacky Cc: linux-arch , "linux-efi@vger.kernel.org" , kvm list , "linux-doc@vger.kernel.org" , X86 ML , "linux-kernel@vger.kernel.org" , kasan-dev , "linux-mm@kvack.org" , iommu@lists.linux-foundation.org, =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , Arnd Bergmann , Jonathan Corbet , Matt Fleming , Joerg Roedel , Konrad Rzeszutek Wilk , Paolo Bonzini , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Andrey Ryabinin , Alexander Potapenko , Thomas Gleixner , Dmitry Vyukov Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 279 Lines: 7 On Tue, Apr 26, 2016 at 3:56 PM, Tom Lendacky wrote: > For AMD processors that support PAT, set the write-protect cache mode > (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05). What's the purpose of using the WP memory type? --Andy