Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753135AbcD1Cvx (ORCPT ); Wed, 27 Apr 2016 22:51:53 -0400 Received: from mail.kernel.org ([198.145.29.136]:41782 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752245AbcD1Cvv (ORCPT ); Wed, 27 Apr 2016 22:51:51 -0400 Date: Wed, 27 Apr 2016 21:51:44 -0500 From: Rob Herring To: tthayer@opensource.altera.com Cc: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, dinguyen@opensource.altera.com, grant.likely@linaro.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com Subject: Re: [PATCHv2 4/7] Documentation: dt: socfpga: Add Arria10 Ethernet binding Message-ID: <20160428025144.GA5837@rob-hp-laptop> References: <1461606768-14404-1-git-send-email-tthayer@opensource.altera.com> <1461606768-14404-5-git-send-email-tthayer@opensource.altera.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1461606768-14404-5-git-send-email-tthayer@opensource.altera.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1848 Lines: 42 On Mon, Apr 25, 2016 at 12:52:45PM -0500, tthayer@opensource.altera.com wrote: > From: Thor Thayer > > Add the device tree bindings needed to support the Altera Ethernet > FIFO buffers on the Arria10 chip. > > Signed-off-by: Thor Thayer > --- > v2 No Change > --- > .../bindings/arm/altera/socfpga-eccmgr.txt | 24 ++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt > index 5a6b160..aa1c593 100644 > --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt > +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt > @@ -76,6 +76,18 @@ Required Properties: > - compatible : Should be "altr,socfpga-a10-ocram-ecc" > - reg : Address and size for ECC block registers. > > +Ethernet FIFO ECC > +Required Properties: > +- compatible : Should be "altr,socfpga-a10-emac0-rx-ecc" for the 1st EMAC > + Receive buffer > + or "altr,socfpga-a10-emac0-tx-ecc" for the 1st EMAC Transmit buffer > + or "altr,socfpga-a10-emac1-rx-ecc" for the 2nd EMAC Receive buffer > + or "altr,socfpga-a10-emac1-tx-ecc" for the 2nd EMAC Transmit buffer > + or "altr,socfpga-a10-emac2-rx-ecc" for the 3rd EMAC Receive buffer > + or "altr,socfpga-a10-emac2-tx-ecc" for the 3rd EMAC Transmit buffer These blocks don't really appear to be different other than the interrupt mask (which is in another block?). I think they should be the same compatible with a property for the interrupt (perhaps a full interrupt-controller binding). > +- reg : Address and size for ECC block registers. > +- parent : phandle to parent Ethernet node. Needs a better name and altr prefix. Maybe altr,eth-mac? Rob