Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753655AbcD1JK4 (ORCPT ); Thu, 28 Apr 2016 05:10:56 -0400 Received: from www381.your-server.de ([78.46.137.84]:42442 "EHLO www381.your-server.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753456AbcD1JKu (ORCPT ); Thu, 28 Apr 2016 05:10:50 -0400 Subject: Re: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation To: Appana Durga Kedareswara Rao , "robh+dt@kernel.org" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , Michal Simek , Soren Brinkmann , "vinod.koul@intel.com" , "dan.j.williams@intel.com" , "moritz.fischer@ettus.com" , "laurent.pinchart@ideasonboard.com" , "luis@debethencourt.com" , Anirudha Sarangi , Punnaiah Choudary Kalluri References: <1461740729-30715-1-git-send-email-appanad@xilinx.com> <57206632.7010508@metafoo.de> <5720B333.4000804@metafoo.de> Cc: "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "dmaengine@vger.kernel.org" From: Lars-Peter Clausen Message-ID: <5721D38A.8010501@metafoo.de> Date: Thu, 28 Apr 2016 11:10:34 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Authenticated-Sender: lars@metafoo.de Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4262 Lines: 85 On 04/28/2016 11:00 AM, Appana Durga Kedareswara Rao wrote: > Hi Lars, > > Thanks for the review... > >> -----Original Message----- >> From: Lars-Peter Clausen [mailto:lars@metafoo.de] >> Sent: Wednesday, April 27, 2016 6:10 PM >> To: Appana Durga Kedareswara Rao ; >> robh+dt@kernel.org; pawel.moll@arm.com; mark.rutland@arm.com; >> ijc+devicetree@hellion.org.uk; galak@codeaurora.org; Michal Simek >> ; Soren Brinkmann ; >> vinod.koul@intel.com; dan.j.williams@intel.com; moritz.fischer@ettus.com; >> laurent.pinchart@ideasonboard.com; luis@debethencourt.com; Anirudha >> Sarangi ; Punnaiah Choudary Kalluri >> >> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- >> kernel@vger.kernel.org; dmaengine@vger.kernel.org >> Subject: Re: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma >> device tree binding documentation >> >> On 04/27/2016 09:33 AM, Appana Durga Kedareswara Rao wrote: >>> Hi Lars, >>> >>>> -----Original Message----- >>>> From: Lars-Peter Clausen [mailto:lars@metafoo.de] >>>> Sent: Wednesday, April 27, 2016 12:42 PM >>>> To: Appana Durga Kedareswara Rao ; >>>> robh+dt@kernel.org; pawel.moll@arm.com; mark.rutland@arm.com; >>>> ijc+devicetree@hellion.org.uk; galak@codeaurora.org; Michal Simek >>>> ; Soren Brinkmann ; >>>> vinod.koul@intel.com; dan.j.williams@intel.com; Appana Durga >>>> Kedareswara Rao ; moritz.fischer@ettus.com; >>>> laurent.pinchart@ideasonboard.com; luis@debethencourt.com; Anirudha >>>> Sarangi ; Punnaiah Choudary Kalluri >>>> >>>> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; >>>> linux- kernel@vger.kernel.org; dmaengine@vger.kernel.org >>>> Subject: Re: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp >>>> dma device tree binding documentation >>>> >>>> On 04/27/2016 09:05 AM, Kedareswara rao Appana wrote: >>>> [...] >>>>> +- xlnx,include-sg : Indicates the controller to operate in simple or >>>>> + scatter gather dma mode >>>>> +- xlnx,ratectrl : Scheduling interval in terms of clock cycles for >>>>> + source AXI transaction >>>>> +- xlnx,overfetch : Tells whether the channel is allowed to over >>>>> + fetch the data >>>>> +- xlnx,src-issue : Number of AXI outstanding transactions on source >>>> side >>>>> +- xlnx,src-burst-len : AXI length for data read. Support only power of >>>>> + 2 byte values. >>>>> +- xlnx,dst-burst-len : AXI length for data write. Support only power of >>>> >>>> These are all software runtime configuration parameters that you'd >>>> want to change at runtime depending on which peripheral you are >>>> targeting with a specific DMA transfer. These really do not belong into the >> devicetree. >>> >>> You mean to have a separate config structure in the driver and handle >>> the above parameters Through that structure??? >>> >>> I understand that above will work for slave dma transfer types what >>> about memory to memory Transfers where we don't have provision to the use >> this parameters... >> >> These parameters are just as application specific as e.g. the DMA >> source/destination address or the DMA transfer length. If you want to use the >> DMA controller in a different configuration you'd have to re-compile the DTB >> and reboot your board, that is not really practical. Especially considering that >> you'd typically have multiple applications using the DMA controller in different >> configurations concurrently. In general if I have to reconfigure the DT depending >> on what application software is running something is fundamentally broken. >> >> Derive these parameters at runtime depending on the requested transfer. E.g. >> some transfer types only work in SG mode, others only work in non-SG modes. >> For those which can work in both modes choose the one that is more efficient. >> Similar for the other parameters. > > Ok will fix in the next version... > Will use module_params for the above properties. Sorry, but that is just as broken. You need to derive those parameters from the DMA transfer as they are transfer specific.