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Date: Wed, 26 Mar 2003 08:12:51 -0800
From: george anzinger <george@mvista.com>
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To: Alan Cox <alan@lxorguk.ukuu.org.uk>
CC: Fionn Behrens <fionn@unix-ag.org>,
       Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
       "Grover, Andrew" <andrew.grover@intel.com>
Subject: Re: System time warping around real time problem - please help
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Alan Cox wrote:
> On Wed, 2003-03-26 at 02:28, george anzinger wrote:
> 
>>Stands for Time Stamp Counter.  It is a special cpu register that 
>>basically counts cpu cycles.  Some times (incorrectly me thinks) it is 
>>affected by power management code which slows the cpu by changing the 
>>cpu frequency.
> 
> 
> Not incorrectly. It counts cpu clocks, its designed for profiling and
> the like. There is no guarantee in any Intel MP standard that the clocks
> are synched up.


> 
I seem to recall a different notion of correctness from Andy Grover... 
  but memory may deceive :(


As for sync, I would think it is a mother board issue.

But as you say, Intel should put in a usable counter.  The HPET seems 
like it has the capabilities, however, I suspect that it is a slow 
read.  Any idea how many cycles it takes to do a memory mapped I/O access?
-- 
George Anzinger   george@mvista.com
High-res-timers:  http://sourceforge.net/projects/high-res-timers/
Preemption patch: http://www.kernel.org/pub/linux/kernel/people/rml

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