Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753559AbcD2Mwh (ORCPT ); Fri, 29 Apr 2016 08:52:37 -0400 Received: from mail-yw0-f174.google.com ([209.85.161.174]:34991 "EHLO mail-yw0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753094AbcD2Mwf (ORCPT ); Fri, 29 Apr 2016 08:52:35 -0400 MIME-Version: 1.0 In-Reply-To: References: <1461167131-26025-1-git-send-email-andrew.smirnov@gmail.com> <1461167131-26025-2-git-send-email-andrew.smirnov@gmail.com> Date: Fri, 29 Apr 2016 14:52:34 +0200 Message-ID: Subject: Re: [PATCH v3 2/3] PCI: imx6: Implement reset sequence for i.MX6+ From: Gary Bisson To: Fabio Estevam Cc: Andrey Smirnov , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Richard Zhu , linux-kernel , Bjorn Helgaas , Lucas Stach Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 841 Lines: 26 Hi all, On Fri, Apr 29, 2016 at 3:47 AM, Fabio Estevam wrote: > On Wed, Apr 20, 2016 at 12:45 PM, Andrey Smirnov > wrote: >> I.MX6+ has a dedicated bit for reseting PCIe core, which should be used >> instead of a regular reset sequence since using the latter will hang the >> SoC. >> >> This commit is based on c34068d48273e24d392d9a49a38be807954420ed from >> http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git >> >> Signed-off-by: Andrey Smirnov > > Reviewed-by: Fabio Estevam Tested on a Nitrogen6QP_MAX with an Intel WiFi Link 5300 PCIe card. Everything is working properly (Gen1 speed). # lspci 00:00.0 Class 0604: 16c3:abcd 01:00.0 Class 0280: 8086:4235 Tested-by: Gary Bisson Thanks, Gary