Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752327AbcD2Qha (ORCPT ); Fri, 29 Apr 2016 12:37:30 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:1302 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751427AbcD2Qh3 (ORCPT ); Fri, 29 Apr 2016 12:37:29 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 29 Apr 2016 09:36:45 -0700 From: Laxman Dewangan To: , , CC: , , , Laxman Dewangan Subject: [PATCH V2] gpio: tegra: Implement gpio_get_direction callback Date: Fri, 29 Apr 2016 21:55:23 +0530 Message-ID: <1461947123-18170-1-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1897 Lines: 57 Implement gpio_get_direction() callback for Tegra GPIO. The direction is only valid if the pin is configured as GPIO. If pin is not configured in GPIO mode then this function return error. Signed-off-by: Laxman Dewangan --- This patch is based on discussion on series Re: [PATCH V5 0/4] gpio: tegra: Cleanups and support for debounce >From Linus W: It would be nice if you also implement .get_direction() which makes debugfs and initial reading of the state of the lines more accurate. V1->V2: - Rearrange the calls to optimise the register access and avoid much indenting based on Stephen's and Jon review. drivers/gpio/gpio-tegra.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index b3ddd92..ec891a27 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -191,6 +191,21 @@ static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset, return 0; } +static int tegra_gpio_get_direction(struct gpio_chip *chip, unsigned offset) +{ + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + u32 pin_mask = BIT(GPIO_BIT(offset)); + u32 cnf, oe; + + cnf = tegra_gpio_readl(tgi, GPIO_CNF(tgi, offset)); + if (!(cnf & pin_mask)) + return -EINVAL; + + oe = tegra_gpio_readl(tgi, GPIO_OE(tgi, offset)); + + return (oe & pin_mask) ? GPIOF_DIR_OUT : GPIOF_DIR_IN; +} + static int tegra_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset, unsigned int debounce) { @@ -575,6 +590,7 @@ static int tegra_gpio_probe(struct platform_device *pdev) tgi->gc.get = tegra_gpio_get; tgi->gc.direction_output = tegra_gpio_direction_output; tgi->gc.set = tegra_gpio_set; + tgi->gc.get_direction = tegra_gpio_get_direction; tgi->gc.to_irq = tegra_gpio_to_irq; tgi->gc.base = 0; tgi->gc.ngpio = tgi->bank_count * 32; -- 2.1.4