Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754031AbcJDId3 (ORCPT ); Tue, 4 Oct 2016 04:33:29 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:40548 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751308AbcJDId1 (ORCPT ); Tue, 4 Oct 2016 04:33:27 -0400 Subject: Re: [PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support To: Mugunthan V N , References: <20161003130318.12591-1-mugunthanvnm@ti.com> <20161003130318.12591-3-mugunthanvnm@ti.com> CC: Tony Lindgren , Rob Herring , Mark Rutland , Russell King , Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Lee Jones , Vignesh R , "Andrew F . Davis" , , , , , Sekhar Nori , John Syne From: Peter Ujfalusi Message-ID: <0ff2c6ef-3fa1-dc8b-fb6e-1a4dcfea8ea9@ti.com> Date: Tue, 4 Oct 2016 11:32:16 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: <20161003130318.12591-3-mugunthanvnm@ti.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3144 Lines: 110 On 10/03/16 16:03, Mugunthan V N wrote: > +static int tiadc_request_dma(struct platform_device *pdev, > + struct tiadc_device *adc_dev) > +{ > + struct tiadc_dma *dma = &adc_dev->dma; > + dma_cap_mask_t mask; > + > + /* Default slave configuration parameters */ > + dma->conf.direction = DMA_DEV_TO_MEM; > + dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; > + dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1; > + > + dma_cap_zero(mask); > + dma_cap_set(DMA_CYCLIC, mask); > + > + /* Get a channel for RX */ > + dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1"); > + if (!dma->chan) > + return -ENODEV; dma_request_chan() ERR_PTR in case of failure, never NULL. You should reuse the returned error code to support deferred probing. > + > + /* RX buffer */ > + dma->buf = dma_alloc_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE, > + &dma->addr, GFP_KERNEL); > + if (!dma->buf) > + goto err; > + > + return 0; > +err: > + dma_release_channel(dma->chan); > + > + return -ENOMEM; > +} > + > static int tiadc_parse_dt(struct platform_device *pdev, > struct tiadc_device *adc_dev) > { > @@ -512,8 +639,14 @@ static int tiadc_probe(struct platform_device *pdev) > > platform_set_drvdata(pdev, indio_dev); > > + err = tiadc_request_dma(pdev, adc_dev); > + if (err && err != -ENODEV) > + goto err_dma; You should handle the deferred probing for DMA channel. > + > return 0; > > +err_dma: > + iio_device_unregister(indio_dev); > err_buffer_unregister: > tiadc_iio_buffered_hardware_remove(indio_dev); > err_free_channels: > @@ -525,8 +658,14 @@ static int tiadc_remove(struct platform_device *pdev) > { > struct iio_dev *indio_dev = platform_get_drvdata(pdev); > struct tiadc_device *adc_dev = iio_priv(indio_dev); > + struct tiadc_dma *dma = &adc_dev->dma; > u32 step_en; > > + if (dma->chan) { > + dma_free_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE, > + dma->buf, dma->addr); > + dma_release_channel(dma->chan); > + } > iio_device_unregister(indio_dev); > tiadc_iio_buffered_hardware_remove(indio_dev); > tiadc_channels_remove(indio_dev); > diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h > index e45a208..b9a53e0 100644 > --- a/include/linux/mfd/ti_am335x_tscadc.h > +++ b/include/linux/mfd/ti_am335x_tscadc.h > @@ -23,6 +23,8 @@ > #define REG_IRQENABLE 0x02C > #define REG_IRQCLR 0x030 > #define REG_IRQWAKEUP 0x034 > +#define REG_DMAENABLE_SET 0x038 > +#define REG_DMAENABLE_CLEAR 0x03c > #define REG_CTRL 0x040 > #define REG_ADCFSM 0x044 > #define REG_CLKDIV 0x04C > @@ -36,6 +38,7 @@ > #define REG_FIFO0THR 0xE8 > #define REG_FIFO1CNT 0xF0 > #define REG_FIFO1THR 0xF4 > +#define REG_DMA1REQ 0xF8 > #define REG_FIFO0 0x100 > #define REG_FIFO1 0x200 > > @@ -126,6 +129,10 @@ > #define FIFOREAD_DATA_MASK (0xfff << 0) > #define FIFOREAD_CHNLID_MASK (0xf << 16) > > +/* DMA ENABLE/CLEAR Register */ > +#define DMA_FIFO0 BIT(0) > +#define DMA_FIFO1 BIT(1) > + > /* Sequencer Status */ > #define SEQ_STATUS BIT(5) > #define CHARGE_STEP 0x11 > -- P?ter