Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754126AbcJDM5Q (ORCPT ); Tue, 4 Oct 2016 08:57:16 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:34636 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754060AbcJDM5N (ORCPT ); Tue, 4 Oct 2016 08:57:13 -0400 From: Mugunthan V N To: CC: , , , , Rob Herring , Mark Rutland , Tony Lindgren , Russell King , Florian Fainelli , David Miller , Sekhar Nori , Mugunthan V N Subject: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings Date: Tue, 4 Oct 2016 18:26:06 +0530 Message-ID: <20161004125607.10569-4-mugunthanvnm@ti.com> X-Mailer: git-send-email 2.10.0.372.g6fe1b14 In-Reply-To: <20161004125607.10569-1-mugunthanvnm@ti.com> References: <20161004125607.10569-1-mugunthanvnm@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1015 Lines: 30 The default impedance settings of the phy is not the optimal value, due to this the second ethernet is not working. Fix it with correct values which makes the second ethernet port to work. Signed-off-by: Mugunthan V N --- arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts index f9cfd3b..d626cd7 100644 --- a/arch/arm/boot/dts/dra72-evm-revc.dts +++ b/arch/arm/boot/dts/dra72-evm-revc.dts @@ -62,6 +62,7 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-imepdance; }; dp83867_1: ethernet-phy@3 { @@ -69,5 +70,6 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-imepdance; }; }; -- 2.10.0.372.g6fe1b14