Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754243AbcJDQg0 (ORCPT ); Tue, 4 Oct 2016 12:36:26 -0400 Received: from exsmtp01.microchip.com ([198.175.253.37]:59176 "EHLO email.microchip.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754162AbcJDQgZ (ORCPT ); Tue, 4 Oct 2016 12:36:25 -0400 From: Cyrille Pitchen To: , CC: , , , , Cyrille Pitchen Subject: [PATCH 1/9] mtd: spi-nor: improve macronix_quad_enable() Date: Tue, 4 Oct 2016 18:37:03 +0200 Message-ID: <84482e0c2b73181036e8e02492434f237f148c7f.1475597385.git.cyrille.pitchen@atmel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 911 Lines: 28 The patch checks whether the Quad Enable bit is already set in the Status Register. If so, the function exits immediately with a successful return code. Otherwise, a message is now printed telling we're setting the non-volatile bit. Signed-off-by: Cyrille Pitchen --- drivers/mtd/spi-nor/spi-nor.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index d0fc165d7d66..5c87b2d99507 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1211,6 +1211,11 @@ static int macronix_quad_enable(struct spi_nor *nor) val = read_sr(nor); if (val < 0) return val; + if (val & SR_QUAD_EN_MX) + return 0; + + /* Update the Quad Enable bit. */ + dev_info(nor->dev, "setting Macronix Quad Enable (non-volatile) bit\n"); write_enable(nor); write_sr(nor, val | SR_QUAD_EN_MX); -- 2.7.4