Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754902AbcJEPdi (ORCPT ); Wed, 5 Oct 2016 11:33:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49514 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752232AbcJEPdg (ORCPT ); Wed, 5 Oct 2016 11:33:36 -0400 From: Lyude To: intel-gfx@lists.freedesktop.org Cc: Lyude , Maarten Lankhorst , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Matt Roper , Daniel Vetter , Jani Nikula , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/6] drm/i915: Add enable_sagv option Date: Wed, 5 Oct 2016 11:33:13 -0400 Message-Id: <1475681598-12081-4-git-send-email-cpaul@redhat.com> In-Reply-To: <1475681598-12081-1-git-send-email-cpaul@redhat.com> References: <1475681598-12081-1-git-send-email-cpaul@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 05 Oct 2016 15:33:36 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2753 Lines: 79 This option allows us to manually control the SAGV at module load time. This can be useful in situations such as trying to debug watermark changes, since enabled SAGV + incorrect watermarks = total GPU annihilation. Signed-off-by: Lyude Cc: Maarten Lankhorst Cc: Ville Syrjälä Cc: Matt Roper --- drivers/gpu/drm/i915/i915_params.c | 5 +++++ drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_display.c | 16 +++++++++++++--- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 768ad89..f462cd4 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -62,6 +62,7 @@ struct i915_params i915 __read_mostly = { .inject_load_failure = 0, .enable_dpcd_backlight = false, .enable_gvt = false, + .enable_sagv = -1, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -233,3 +234,7 @@ MODULE_PARM_DESC(enable_dpcd_backlight, module_param_named(enable_gvt, i915.enable_gvt, bool, 0400); MODULE_PARM_DESC(enable_gvt, "Enable support for Intel GVT-g graphics virtualization host support(default:false)"); + +module_param_named_unsafe(enable_sagv, i915.enable_sagv, int, 0400); +MODULE_PARM_DESC(enable_sagv, + "Enable the SAGV (gen9+ only)(1=enabled, 0=disabled, -1=driver discretion [default])"); diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 3a0dd78..a7db125 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -65,6 +65,7 @@ struct i915_params { bool enable_dp_mst; bool enable_dpcd_backlight; bool enable_gvt; + int enable_sagv; }; extern struct i915_params i915 __read_mostly; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a71d05a..dd15ae2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -16904,12 +16904,22 @@ intel_modeset_setup_hw_state(struct drm_device *dev) pll->on = false; } - if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) + if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) { vlv_wm_get_hw_state(dev); - else if (IS_GEN9(dev)) + } else if (IS_GEN9(dev)) { skl_wm_get_hw_state(dev); - else if (HAS_PCH_SPLIT(dev)) + + if (i915.enable_sagv != -1) { + if (i915.enable_sagv) + intel_enable_sagv(dev_priv); + else + intel_disable_sagv(dev_priv); + + dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; + } + } else if (HAS_PCH_SPLIT(dev)) { ilk_wm_get_hw_state(dev); + } for_each_intel_crtc(dev, crtc) { unsigned long put_domains; -- 2.7.4