Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932934AbcJHAMd (ORCPT ); Fri, 7 Oct 2016 20:12:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59898 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932858AbcJHAMZ (ORCPT ); Fri, 7 Oct 2016 20:12:25 -0400 From: Lyude To: intel-gfx@lists.freedesktop.org Cc: Lyude , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Paulo Zanoni , Daniel Vetter , Jani Nikula , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/10] drm/i915/gen9: Cleanup skl_pipe_wm_active_state Date: Fri, 7 Oct 2016 20:11:28 -0400 Message-Id: <1475885497-6094-5-git-send-email-cpaul@redhat.com> In-Reply-To: <1475885497-6094-1-git-send-email-cpaul@redhat.com> References: <1475885497-6094-1-git-send-email-cpaul@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Sat, 08 Oct 2016 00:12:25 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3684 Lines: 102 This function is a wreck, let's help it get it's life back together and cleanup all of the copy pasta here. (adding Maarten's reviewed-by since this is just a split-up version of one of the previous patches) Signed-off-by: Lyude Reviewed-by: Maarten Lankhorst Cc: Ville Syrjälä Cc: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 52 +++++++++++------------------------------ 1 file changed, 14 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 4c2ebcd..5dbaf12 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4267,46 +4267,22 @@ static void ilk_optimize_watermarks(struct intel_crtc_state *cstate) static void skl_pipe_wm_active_state(uint32_t val, struct skl_pipe_wm *active, bool is_transwm, - bool is_cursor, int i, int level) { + struct skl_plane_wm *plane_wm = &active->planes[i]; bool is_enabled = (val & PLANE_WM_EN) != 0; if (!is_transwm) { - if (!is_cursor) { - active->planes[i].wm[level].plane_en = is_enabled; - active->planes[i].wm[level].plane_res_b = - val & PLANE_WM_BLOCKS_MASK; - active->planes[i].wm[level].plane_res_l = - (val >> PLANE_WM_LINES_SHIFT) & - PLANE_WM_LINES_MASK; - } else { - active->planes[PLANE_CURSOR].wm[level].plane_en = - is_enabled; - active->planes[PLANE_CURSOR].wm[level].plane_res_b = - val & PLANE_WM_BLOCKS_MASK; - active->planes[PLANE_CURSOR].wm[level].plane_res_l = - (val >> PLANE_WM_LINES_SHIFT) & - PLANE_WM_LINES_MASK; - } + plane_wm->wm[level].plane_en = is_enabled; + plane_wm->wm[level].plane_res_b = val & PLANE_WM_BLOCKS_MASK; + plane_wm->wm[level].plane_res_l = + (val >> PLANE_WM_LINES_SHIFT) & PLANE_WM_LINES_MASK; } else { - if (!is_cursor) { - active->planes[i].trans_wm.plane_en = is_enabled; - active->planes[i].trans_wm.plane_res_b = - val & PLANE_WM_BLOCKS_MASK; - active->planes[i].trans_wm.plane_res_l = - (val >> PLANE_WM_LINES_SHIFT) & - PLANE_WM_LINES_MASK; - } else { - active->planes[PLANE_CURSOR].trans_wm.plane_en = - is_enabled; - active->planes[PLANE_CURSOR].trans_wm.plane_res_b = - val & PLANE_WM_BLOCKS_MASK; - active->planes[PLANE_CURSOR].trans_wm.plane_res_l = - (val >> PLANE_WM_LINES_SHIFT) & - PLANE_WM_LINES_MASK; - } + plane_wm->trans_wm.plane_en = is_enabled; + plane_wm->trans_wm.plane_res_b = val & PLANE_WM_BLOCKS_MASK; + plane_wm->trans_wm.plane_res_l = + (val >> PLANE_WM_LINES_SHIFT) & PLANE_WM_LINES_MASK; } } @@ -4345,20 +4321,20 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) for (level = 0; level <= max_level; level++) { for (i = 0; i < intel_num_planes(intel_crtc); i++) { temp = hw->plane[pipe][i][level]; - skl_pipe_wm_active_state(temp, active, false, - false, i, level); + skl_pipe_wm_active_state(temp, active, false, i, level); } temp = hw->plane[pipe][PLANE_CURSOR][level]; - skl_pipe_wm_active_state(temp, active, false, true, i, level); + skl_pipe_wm_active_state(temp, active, false, PLANE_CURSOR, + level); } for (i = 0; i < intel_num_planes(intel_crtc); i++) { temp = hw->plane_trans[pipe][i]; - skl_pipe_wm_active_state(temp, active, true, false, i, 0); + skl_pipe_wm_active_state(temp, active, true, i, 0); } temp = hw->plane_trans[pipe][PLANE_CURSOR]; - skl_pipe_wm_active_state(temp, active, true, true, i, 0); + skl_pipe_wm_active_state(temp, active, true, PLANE_CURSOR, 0); intel_crtc->wm.active.skl = *active; } -- 2.7.4