Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751229AbcJIXa0 (ORCPT ); Sun, 9 Oct 2016 19:30:26 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:48135 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750786AbcJIXaZ (ORCPT ); Sun, 9 Oct 2016 19:30:25 -0400 Date: Mon, 10 Oct 2016 01:27:56 +0200 (CEST) From: Thomas Gleixner To: Rich Felker cc: linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, Jason Cooper , Marc Zyngier , Daniel Lezcano , "Paul E. McKenney" Subject: Re: [PATCH] irqchip/jcore: fix lost per-cpu interrupts In-Reply-To: <20161009220616.GD19318@brightrain.aerifal.cx> Message-ID: References: <41fc74d0bdea4c0efc269150b78d72b2b26cb38c.1475992312.git.dalias@libc.org> <20161009144715.GB19318@brightrain.aerifal.cx> <20161009220616.GD19318@brightrain.aerifal.cx> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1101 Lines: 27 On Sun, 9 Oct 2016, Rich Felker wrote: > On Sun, Oct 09, 2016 at 09:23:58PM +0200, Thomas Gleixner wrote: > > Well, you can use handle_percpu_irq() for your device interrupts if you > > guarantee at the hardware level that there is no reentrancy. > > Reentrancy is possible of course if the kernel enables irqs during the > irq handler. Is not doing so a stable part of the kernel irq > subsystem? My understanding is that modern kernels keep irqs disabled > for the full duration of (hard) irq handlers. If you enable lockdep then it will yell at offenders which enable irqs in the interrupt handler. So yes, hard irq handlers are not allowed to reenable interrupts. > > Once you make > > the hardware capable of delivering them on either core the picture changes. > > *nod* Perhaps if/when we do that, the path of least resistence would > be to adjust the irq numbering so that percpu (i.e., hard-routed to a > particular cpu) and global irqs (deliverable on any core) are in > different ranges and the existing kernel frameworks work. That's very much what ARM and others do. Thanks, tglx