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Date: Fri, 28 Mar 2003 00:31:22 -0800
From: Bryan Rittmeyer <bryanr@bryanr.org>
To: Andrew Fleming <afleming@motorola.com>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.linuxppc.org
Subject: Re: [patch] oprofile + ppc750cx perfmon
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On Thu, Mar 27, 2003 at 02:37:34PM -0600, Andrew Fleming wrote:
> I'm 99.9% positive that the counters are different.  In my experience, 
> every new microarchitecture has a completely different set of counters. 

yup. a kernel API to wrap all the low-level register config would be
nice but my interest for now is just the ppc750cx. If someone else wants to
build additional ppc32 support into oprofile, my patches could serve as a
basic starting point.

> Earlier on the list, the possibility of using the performance interrupt 
> with the timebase was proposed.

the timebase is simpler but less configurable than the PMCs.
my latest patch runs everything (oprofile+timer_interrupt)
via the timebase--there is no real support yet for the more
sophisticated PMCs.

We can allow for more user configurability by using the timebase
along side PMC interrupts. However, then we have to identify
which counter(s) caused a given interrupt, and that probably means
keeping some past state for the timebase and PMCs. For now, I'm satisfied
with hardcoded 1500 Hz profiling via the timebase; finishing up the syscall
interception is more important.

> [dec/pm switch-over race in v0003]

known issue, I was pondering a solution for a few days. It seems like
the decrementer is not individually maskable or haltable so my v0004
approach is to just do mtspr(SPRN_DEC, 0x7fffffff) upon enabling perfmon
and again inside each pm_irq.

-Bryan
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