Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753532AbcJKMu6 (ORCPT ); Tue, 11 Oct 2016 08:50:58 -0400 Received: from mail-ve1eur01on0130.outbound.protection.outlook.com ([104.47.1.130]:52781 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751672AbcJKMuU (ORCPT ); Tue, 11 Oct 2016 08:50:20 -0400 X-Greylist: delayed 74815 seconds by postgrey-1.27 at vger.kernel.org; Tue, 11 Oct 2016 08:50:18 EDT Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=peda@axentia.se; Subject: Re: [PATCH 04/10] i2c: i2c-sam: Add device tree bindings To: Rob Herring , Pantelis Antoniou References: <1475853518-22264-1-git-send-email-pantelis.antoniou@konsulko.com> <1475853518-22264-5-git-send-email-pantelis.antoniou@konsulko.com> <20161010195458.GA20134@rob-hp-laptop> CC: Lee Jones , Linus Walleij , Alexandre Courbot , "Mark Rutland" , Frank Rowand , Wolfram Sang , David Woodhouse , Brian Norris , Florian Fainelli , Wim Van Sebroeck , Debjit Ghosh , Georgi Vlaev , Guenter Roeck , Maryam Seraj , , , , , , , From: Peter Rosin Organization: Axentia Technologies AB Message-ID: <1f5afc57-6b12-4096-587f-5a0f4ebee673@axentia.se> Date: Tue, 11 Oct 2016 09:13:42 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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No other values supported. >> + >> +Examples: >> + >> +pe1i2c: i2c-sam-mux@1,0 { > > i2c-mux@... > >> + compatible = "jnx,i2c-sam-mux"; >> + reg = <1 0>; >> +}; >> diff --git a/Documentation/devicetree/bindings/i2c/i2c-sam.txt b/Documentation/devicetree/bindings/i2c/i2c-sam.txt >> new file mode 100644 >> index 0000000..4830b48 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/i2c/i2c-sam.txt >> @@ -0,0 +1,44 @@ >> +Juniper's SAM FPGA I2C accelerator >> + >> +The SAM FPGA accelerator is used to connect the large number of >> +I2C muxes that are present on Juniper PTX series of routers. >> +While it's an i2c bus, no other devices are located besides >> +i2c-sam-mux devices. >> + >> +The definition of the i2c sam mux is located in the i2c-sam-mux.txt document. >> + >> +Required properties: >> +- compatible: should be "jnx,i2c-sam". >> +- #address-cells: should be 2. >> +- #size-cells: should be 0. >> +- mux-channels: number of mux channels present > > What is this needed for? > >> + >> +Optional properties: >> +- reg: offset and length of the register set for the device are optional since >> + typically the register range is provided by the parent SAM MFD device. >> +- master-offset: Offset of where the master register memory starts. >> + Default value is 0x8000. > > Make this required. > >> +- reverse-fill: Fill the start entries of transactions in reverse order > > Needs a better explanation. > >> +- priority-tables: Use the pre-programmed priority tables in the FPGA > > What does not present mean? > >> +- i2c-options: list of options to be written to the option field in the >> + FPGA controlling things like SCL push-pull drives, hold-times, etc. > >> +- bus-range: start of bus master range and number of masters. > > Needs a better explanation. > >> + >> +Examples: >> + >> +i2c-sam { >> + compatible = "jnx,i2c-sam"; >> + mux-channels = <2>; >> + #size-cells = <0>; >> + #address-cells = <2>; >> + >> + /* PE0 */ pe0i2c: i2c-sam-mux@0,0 { > > i2c-mux@... Hmm, I actually think i2c@... is the usual naming for i2c-mux children. Cheers, Peter >> + compatible = "jnx,i2c-sam-mux"; >> + reg = <0 0>; >> + }; >> + >> + /* PE1 */ pe1i2c: i2c-sam-mux@1,0 { >> + compatible = "jnx,i2c-sam-mux"; >> + reg = <1 0>; >> + }; >> +}; >> -- >> 1.9.1 >>