Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751798AbcJMHCP (ORCPT ); Thu, 13 Oct 2016 03:02:15 -0400 Received: from mail-lf0-f51.google.com ([209.85.215.51]:34065 "EHLO mail-lf0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750944AbcJMHCE (ORCPT ); Thu, 13 Oct 2016 03:02:04 -0400 MIME-Version: 1.0 In-Reply-To: <1476124792-18441-1-git-send-email-aaron.brice@datasoft.com> References: <1476124792-18441-1-git-send-email-aaron.brice@datasoft.com> From: Ulf Hansson Date: Thu, 13 Oct 2016 09:01:29 +0200 Message-ID: Subject: Re: [PATCH v2] sdhci-esdhc-imx: Correct two register accesses To: Aaron Brice Cc: Adrian Hunter , Aisheng Dong , linux-mmc , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Dave Russell Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2922 Lines: 79 On 10 October 2016 at 20:39, Aaron Brice wrote: > > - The DMA error interrupt bit is in a different position as > compared to the sdhci standard. This is accounted for in > many cases, but not handled in the case of clearing the > INT_STATUS register by writing a 1 to that location. > - The HOST_CONTROL register is very different as compared to > the sdhci standard. This is accounted for in the write > case, but not when read back out (which it is in the sdhci > code). > > Signed-off-by: Dave Russell > Signed-off-by: Aaron Brice > Acked-by: Dong Aisheng > --- Thanks, applied for fixes! Kind regards Uffe > > v1 -> v2: > - rename long_val to val > > drivers/mmc/host/sdhci-esdhc-imx.c | 23 ++++++++++++++++++++++- > 1 file changed, 22 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > index 1f54fd8..7123ef9 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -346,7 +346,8 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) > struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); > u32 data; > > - if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) { > + if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE || > + reg == SDHCI_INT_STATUS)) { > if ((val & SDHCI_INT_CARD_INT) && !esdhc_is_usdhc(imx_data)) { > /* > * Clear and then set D3CD bit to avoid missing the > @@ -555,6 +556,25 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) > esdhc_clrset_le(host, 0xffff, val, reg); > } > > +static u8 esdhc_readb_le(struct sdhci_host *host, int reg) > +{ > + u8 ret; > + u32 val; > + > + switch (reg) { > + case SDHCI_HOST_CONTROL: > + val = readl(host->ioaddr + reg); > + > + ret = val & SDHCI_CTRL_LED; > + ret |= (val >> 5) & SDHCI_CTRL_DMA_MASK; > + ret |= (val & ESDHC_CTRL_4BITBUS); > + ret |= (val & ESDHC_CTRL_8BITBUS) << 3; > + return ret; > + } > + > + return readb(host->ioaddr + reg); > +} > + > static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) > { > struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > @@ -947,6 +967,7 @@ static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) > static struct sdhci_ops sdhci_esdhc_ops = { > .read_l = esdhc_readl_le, > .read_w = esdhc_readw_le, > + .read_b = esdhc_readb_le, > .write_l = esdhc_writel_le, > .write_w = esdhc_writew_le, > .write_b = esdhc_writeb_le, > -- > 2.7.4 >